TI Solutions for Environmental Extremes - Texas Instruments Sree Addepalli - Texas ...
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Texas Instruments
TI Solutions for Environmental Extremes
Sree Addepalli
Marketing Lead // Space & Enhanced Products
Hot links:
Enhanced Product Portfolio
Enhanced products: Orderables
Enhanced products: Quality matrix
TI’s full range of solutions
TI is growing and investing in all of these product areas
Quality / Reliability / Cost
Commercial Q100 EP QMLQ QMLV
Packaging Plastic Plastic Plastic Ceramic Ceramic
Single Controlled Baseline No No Yes Yes Yes
Bond Wires Au/Cu Au/Cu Au Al Al
Is Pure Sn used? Yes Yes No No No
Guaranteed Rad
No No No No Yes
Performance
Typical Temperature Range -40ºC - 85ºC -40ºC - 125ºC -55ºC - 125ºC (majority) -55ºC - 125ºC -55ºC - 125ºC
Extra Qualification and
No Yes Yes Yes Yes
Process Monitors
Life Test Per Wafer Lot No No No No Yes
Specification Management No No VID SMD SMD
High reliability for automotive Similar flow compared to Q100. Ceramic military grade parts Radiation assured space grade
Low cost and high volume.
applications. No single baseline Controlled baseline ensures more released to a MIL spec. Good for parts release to a MIL spec. Meant
Comments Tailored for commercial and
control. Flow uses matte Sn and Cu homogenous performance across temperature extremes and long for long lifetime, high reliability
applications
bond wires. lots. term dormant storage missions
*Space EP currently in definition
What defines an Enhanced Product?
• Single Controlled Baseline flow
• Gold (Au) bond wires
• Vendor Item drawing
• Roughened leadframe and best available material set
• 250 Hour HAST
• Tin content < 97%
• Reliability Reports on ti.com
3
Failure mechanisms and Enhanced Product (EP) mitigation
Failure mechanism EP flow mitigation tactic
Designed for long lifetime applications (15+ years) +
Obsolescence – requires redesign obsolescence mitigation potential (sequestered die bank,
resurrections)
Copper Bond wire – high stress can cause bond Au bond wire only as part of EP definition
weakness/failure
Variability + traceability failure – specs can vary Controlled Baseline and material set (single fab/A/T) +
part to part Reliability reports + VIDs
Tin Whiskers – during high stress usage No pure or matte tin used >97%
Delamination – can occur during stress testing Rugged leadframe, improved die attach, better mold
compounds (more expensive but more rugged options)
EP qualification matrix * Lines in green are either not done in Q100 or have less coverage in Q100
Enhanced Products New Device Qualification Matrix (Note that qualification by similarity (“qualification family”) per JEDEC JESD47 is allowed)
Description Condition Sample Size Used/Rejects Lots Required Test Method
Electromigration Maximum Recommended Operating Conditions N/A N/A Per TI Design Rules
Wire Bond Life Maximum Recommended Operating Conditions N/A N/A Per TI Design Rules
Electrical Characterization TI Data Sheet 15 3 N/A
HBM EIA/JESD22-A114
Electrostatic Discharge Sensitivity 3 units/voltage N/A
CDM EIA/JESD22-C101
Latch-up Per Technology 5/0 3 EIA/JESD78
Physical Dimensions TI Data Sheet 5/0 1 EIA/JESD22- B100
Thermal Impedance Theta-JA on board Per Pin-Package N/A EIA/JESD51
Bias Life Test 125°C / 1000 hours or equivalent 45/0 3 JESD22-A108*
Biased Humidity 85°C / 85% / 1000 hours JESD22-A101*
or or 77/0 3
Biased HAST 130°C / 85% / 96 hours JESD22-A110*
Extended Biased Humidity 85°C / 85% / 2600 hours (for reference) JESD22-A101*
or or 77/0 1
Extended Biased HAST 130°C / 85% / 250 hours (for reference) JESD22-A110*
Unbiased HAST 130°C / 85% / 96 hours 77/0 3 JESD22-A.118*
Temperature Cycle -65°C to +150°C non-biased for 500 cycles 77/0 3 JESD22-A104*
Solder Heat 260°C for 10 seconds 22/0 1 JESD22-B106
Resistance to Solvents Ink symbol only 12/0 1 JESD22-B107
Solderability Condition A (steam age for 8 hours) 22/0 1 ANSI/J-STD-002-92
Flammability Method A / Method B 5/0 1 UL-1964
Bond Shear Per wire size 5 units x 30/0 bonds 3 JESD22-B116
Bond Pull Strength Per wire size 5 units x 30/0 bonds 3 ASTM F-459
Die Shear Per die size 5/0 3 TM 2019
High Temp Storage 150 °C / 1,000 hours 15/0 3 JESD22-A103-A*
Moisture Sensitivity Surface Mount Only 12 1 J-STD-020-A*
*Precondition performed per JEDEC Std. 22, Method A112/A113
Enhanced Products (More than 750 EP Products)
Complete System
Power Management
Switching Supervisors &
LDOs References DDR Solutions Isolation
Regulators 80 EP Products 6 EP Products 2 EP Products 4 EP Products
Sequencing
53 EP Products 12 EP Products
Amp DSP
50+ EP ADC DAC
Microcontroller Amp
Products 17 EP Products 12 EP Products
32 EP Products
Clocks &
Logic Interface Sensing/AFE
180+ EP Products 25+ EP Products 5 EP Products
Timing
6 EP Products
End Equipment Block Diagrams
Avionics Defense Industrial Transportation Medical Phased Array Radar IMU Actuator Motor Control ECU
6
Enhanced Products (EP) roadmap
UCD90xx0-EP SN65HVD01-EP TMS320F28035-EP
Power Supply Sequencer 3.3 V RS-485 with 1.65 V Piccolo MCU
and Monitor/Manager I/O Supply and Selectable
Data Rate
2018
Concept TPS549D22-EP TMS570LC4357-EP
1.5V to 16V , 40A SWIFT CDCM6208V1F-EP (337 NFBGA)
Step-Down Converter 2:8 Ultra Low Power, Low Hercules MCU
Jitter Clock Generator,
TPS54318-EP Pin Mode Variant F TMS320F28377D-EP
2.95V to 6V Input, 3A OPA2356-EP Delfino Dual-Core MCU
Synchronous Step-Down 2.5V, 200MHz GBW, SN65LBC17xA-EP BGA and PTP
SWIFT™ Converter CMOS Dual Op Amp Quadruple RS-485
Differential Line AM5718-HIREL
REF3425-EP
Receivers (760 FCBGA)
2.5V Low-Drift Low- TLV3012-EP ARM® Cortex®-A15
In Development Power Small-Footprint Nanopower, 1.8V, SOT23 Sitara Processor
Series Voltage Reference
2017
Push-Pull Comparator SN74LVTH16373-EP
TPS79901-EP (6 WSON) with Voltage Reference 3.3-V ABT 16-Bit MSP430FR5989-EP
200mA, Ultra-Low Noise, Transparent D-Type (64 VQFN)
High PSRR Low Dropout OPA2211-EP Latches With 3-State 16 MHz ULP
Linear Regulator Low Noise, Low Power, Outputs Microcontroller with 128
DAC34H84-EP KB FRAM
Quad-Channel, 16-Bit, Precision Operational
TPS7A4701-EP (20 VQFN)
36-V, 1-A, 4.17-μVRMS, 1.25-GSPS, 1x-16x Amplifier LMK04828-EP MSP430FR5739-EP
RF LDO Voltage Regulator Interpolating DAC Ultra Low Jitter Mixed Signal
OPA2171-EP Synthesizer and Jitter Microcontroller with
ISO5852S-EP (16 SOIC) ADS6444-EP 36V, Low Power, RRO, Cleaner FRAM
Recently Reinforced Isolated IGBT Quad Channel, 14 Bit, Operational Amplifier
Gate Driver 125/105/80/65 Msps
SN55HVD75-EP
Released TPS5426x-EP (10 VSON)
Adc With Serial Lvds
Outputs
OPA4277-EP
3.3V, 20Mbps RS-485
AM3358-EP
Sitara™ Processor
2016
3.5V to 60V, 2.5A SWIFT High Precision with ESD Protection
Converter Operational Amplifier
ADS1278-EP TMS570LS3137-EP
TPS7A4001-EP DRV8842-EP
Octal, 144kHz, 24 Bit Delta OPA2277-EP 16- and 32-bit Hercules
100V, 50mA, Single Sigma, Simultaneous 5A Brushed DC or Half-
Output Low-Dropout High Precision Bipolar Stepper Motor RISC Flash
Sampling Microcontroller
Linear Regulator Operational Amplifier Driver (PWM Ctrl)
Power Data Converter Amplifiers Interface/Clocking Embedded
Processing
All roadmaps are subject to change based on market direction, resource limitations, etc.
*HIREL generally indicates part will be the same as an EP product without extended HAST or a V62 numberMotor Control THS1408-EP
TPS7A7200-EP 2A, Single Output, Very Low Input,
TPS54350-EP 2A, Single Output, Very Low Input, Configurable Fixed (0.9 to 5.0V) Low-
4.5-V To 20-V Input 3-A Output Configurable Fixed (0.9 to 5.0V) Low- Dropout Linear Regulator
UC2625-EP
Dropout Linear Regulator Brushless DC motor controller
Synchronous Pwm Switcher
integrates most of the functions
W/Integrated Fet
required for high-performance
brushless dc motor control into one
package
DC/DC LDO Voltage/Shunt
Feedback ADC
SN65HVD1050-EP
CAN Transceiver Microcontroller (MCU) Motor Controller with
SPI, I2C, UART, CAN, USB
integrated Current Power FETs/
SN65HVD09-EP 200 MHz 200 MHz Sense Amplifier Darlingtons
32-bit CLA
C28x CPU 200 MHz
CLA
RS422/485 Transceiver
Current
MAX3232-EP 200 MHz Feedback
1024 KB
32-bit
Flash
C28x CPU
Motor
RS 232 Driver/Receiver
Isolated IGBT
Gate Driver
New!
TMS320F28377D-EP OPA2277-EP
Dual-Core Delfino Microcontroller ISO5852S-EP 10µV, 0.1µV/˚C, High-Precision, Low-
designed for advanced closed-loop High-CMTI 2.5-A/5-A Isolated IGBT, Power Operational Amplifier
control applications MOSFET Gate Driver With Split Available today!
Available today! Outputs and Protection Features 8
Available today!High Speed Signal Chain for Communication
THS4503-EP ADS5463-EP Memory Power
Wideband Low-Distortion Fully 12-Bit, 500-MSPS Analog-to-Digital Converter
Differential Amplifier DDR
DDR DDR Term
Complex Mixer
TPS51216-EP
Digital Interface
2A Complete DDR2, DDR3 and DDR3L
ADC Memory Power Solution
TPS51200-EP New!
IF 3A Sink/Source DDR Termination
RF
Regulator
ADC TMP422-EP Signal Chain Power
Low Noise LDOs
CDCLVP111-EP
1:10 with Selectable Input ClockLO
Driver TMP422-EP
Dual Remote and Local Temperature TPS79901-EP New!
New! TMP422-EP Sensor with N-Factor and Series-R
LMK04828-EP 2.7- 6.5 VIN, 0.2A LDO
CLK Correction
Ultra Low-Noise JESD204B Compliant Clock TPS7A4701-EP New!
Jitter Cleaner 36-V, 1-A, 4-μVRMS
Clocking FPGA
SYSREF TPS74401-EP
FPGA 0.9 – 5.5 VIN, 3A LDO
CLK
FPGA/Processor Power
LO
High Output Current LDOs
THS4271-EP
Low Noise High Slew Rate Unity Gain
Stable Voltage Feedback Amplifier DAC High Power Density DC/DC
Converter
RF
DAC TPS55340-EP
Integrated, 5-A 40-V Wide Input Range
Boost/SEPIC/Flyback DC-DC Regulator
DAC5687-EP
16-Bit, 500-MSPS
9
DAC5675-EP
14-Bit 400-MspsKey Resources: • EP Orderables List: http://www.ti.com/pdfs/hirel/mltry/EP_Orderable_Release_List.pdf • MSL Level Search: http://www.ti.com/packaging/docs/mslsearch.tsp • Thermal Calculator: http://www.ti.com/adc/docs/midlevel.tsp?contentId=76735&keyMatch=thermal%20c alculator&tisearch=Search-EN-Everything • Product Shelf Life Search: http://www.ti.com/quality/docs/productshelflife.tsp • DPPM/FIT/MTBF estimator: http://www.ti.com/quality/docs/estimator.tsp • Various Calculators: http://www.ti.com/lsds/ti/quality/reliability/calculators.page • Material Content Search: http://www.ti.com/quality/docs/materialcontentsearch.tsp • Send requests for missing reliability reports to ep_reliability_reports@list.ti.com
Thanks for watching!
Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers in
TI’s E2E Community. Post in the High Reliability Forum today!Reference Slides
EP reliability reports on TI.com
• Traceability (FAB, assembly, test site)
• Packaging material
• Qualification test resultsBaseline Controlled Flow High Temp Plastic Flow
Commercial Flow EP Flow Quality and Temp Driven
One Wafer One Wafer
Wafer Wafer Wafer Wafer Fab/ HT Die
Fab Fab Fab Fab Fab
A/T Site A/T Site A/T Site A/T Site A/T Site A/T Site
Material Material Material Material HT Material Set
Material Set
Set Set Set Set
Commercial products can be built in multiple FABs, A/T sites EP products are built in one FAB, one A/T site, HT products are built in one FAB, one AT site
and may use various material sets for each product build and use one material set for product build and use one material set optimized for HT
Different fabs, material sets and AT sites can introduce variability over time.
This can cause changes in system performance for long-running programs.Au vs. Cu Bond Wire
The reliability of Cu bondwire has not been proven in mission critical applications, harsh
environments, or in applications where long term dormant storage (10 to 20 years) is
required.
Munitions
Aircraft
Aerospace
Applications with extensive temp cycling
Applications with long term storage requirements
Potential risks identified by the industry include
Bond integrity (Cu bonding to aluminum requires much tighter process controls and environments) 1
Sporadic DPPM level corrosion due to mold compound interaction2
Bondwire neck breaks during temperature cycling (The coefficient of thermal expansion [CTE] of Cu is higher than
Au, resulting in a higher failure rate in the presence of delamination compared to Au)3
Sources:
1 Luke England and Tom Jiang. “Reliability of Cu Wire Bonding to Al Metallization”. Electronic Components and Technology Conference. 2007.
2 Hui Teng, et al. “Effect of Moisture and Temperature on Al-Cu Interfacial Strength”. International Conference on Electronic Packaging Technology & High Density Packaging, 2008.
3 Bart Vandevelde and Geert Willems. “Early fatigue failures in Cooper wire bonds inside packages with low CTE Green Mold Compounds”. 4 th ESTC Conference. 2012, Amsterdam, The Netherlands.
15Tin Whiskering
• When tin inside a package is subject to large internal or
external stress, it has the tendency to randomly crystallize
and extend like a tendril through a part
• This can cause short circuits if the tendrils reach another
surface.
• To avoid this issue, EP parts do not use pure tin anywhere in
the package or leadframe
• This is a well documented issue by many customers,
including NASA, who had satellites stop functioning due to tin
whiskers
• The NASA website has examples of tin whiskering issues in
many different end equipments, including radios, GPS
modules, circuit breakers, power distribution equipment, etc.
16EP Release Flow Chart – BOM/Flow Changes
ASSY FLOW CHANGES: FAB / TEST FLOW CHANGES:
A. NEW EP PRODUCTS RELEASE IN ROUGHENED
LEADFRAMES (EXCEPTIONS SHOULD BE 1. PLAN TO RUN ATLEAST 2 TEMPS ( ROOM & HOT).
IDENTIFIED & RISK APPROVED AT PPR ) . VERIFY EXISTING TEST HARDWARE & HANDLER
IS CAPABLE TO RUN FOR THESE TEMPS. COLD
B. CHANGE LEADFRAMES AS NEEDED TO HAVE TEMP IS NVA FOR MOST A/T.
NIPDAU FINISH OR SNPB.
2. RELEASE SEPARATE TEST PROGRAM FOR
C. BGA PACKAGES NEED TO CHANGE TO SNPB HIREL TO HAVE CONTROL AND AVOID TEST
SOLDER BALLS, FLIP CHIP NEEDS INTERNAL REMOVAL FOR TIME OPTIMISATION.
BUMP CHANGED TO SNPB AS WELL.
3. RELEASE SEPARATE HIREL DIE IN FAB TO
D. CHANGE TO GOLD WIRE. BASE LINE LOCK OR MAINTAIN
REVIEW ASSY & MASKS/RETICLE REV AS IS EVEN WHEN
USE HIGH RELIABILITY BOM – HIGH TEMP MOLD COMMERCIAL CHANGES DIE.
TEST FLOW. E.
AND MOUNT COMPOUND COMPLEMENTING
ROUGHENED LEADFRAMES FOR LESS DELAM. 4. TESTER CONVERSIONS TO NON LEGACY
INCASES WHERE ORIGINAL DEVICE IS STILL
F. ADD 100% RELFOW AND SAMPLE XRAY IN RUNNING ON LEGACY TEST PLATFORM AND NO
ASSEMBLY FLOW TO CATCH GROSS DEFECTS PLANS TO CONVERT.
LIKE WIRE SWEEP & CRACK DIES ETC.
5. ALIGN WITH ROAD MAP TEST SITES AND
G. ASSEMBLY SITE CHANGES TO COMPLY WITH RELEASE IN NEW SITES AS NEEDED.
CURRENT ROAD MAP STRATEGY. SOMETIMES
NEED EXTRA QUAL.
H. ENSURE SINGLE BOM IN ATSS.
17EP Flow Chart – Validation: ATE / Bench Characterization
ADD TESTS IN ATE FOR FOLLOWING: CHARACTERIZATION STEPS:
A. COVERING ROC CORNERS LIKE VOLTAGE & 1. PERFORM CHAR ON 30 UNITS POPULATED
FREQUENCY CORNERS FOR CHAR / PROD FROM 3 LOTS ACROSS TEMPS.
PROGRAM.
2. CPK CONSIDERATIONS: HIREL HAS BEEN
B. MISSING MIN-MAX PARAMETERS (NPT IS FOLLOWING LIMIT OF 1.67 FOR CPK. DATA
ALLOWED BUT NEEDS STATISTICAL PROOF PER ANALYSIS TO BE PERFORMED AND ALL
QSS) AEO DOES TEST TIME REDUCTIONS AND PARAMETERS FAILING THIS SHOULD BE
MOST OF PROGRAMS HAVE OPTIMISED JUSTIFIED PER QSS.
COVERAGE BASED ON HISTORIC FALL OUT.
3. NPT: NON PRODUCTION TESTED
Regenerate VVCM C. PLAN FOR TESTS NEEDED TO CREATE GRAPH PARAMETERS WILL NEED TO HAVE CPK OF
per latest Data sheet TEMP EXTESNIONS. FROM BENCH / ATE CHAR AND PROPER
For the validation EXPLANATION PROVIDED FOR NOT TESTING.
D. SPEC PARAMETERS WHERE BENCH DATA OR
section only. CHAR DATA IS NOT AVAILABLE. 4. NVA: NON VALUE ADDED TEMP INSERTION
REMOVAL NEEDS TO HAVE GUARDBAND STUDY
E. BEST PRACTICES AT TIME OF RELEASE – DONE WITH CHAR DATA. LIMITS AT ROOM TEMP
EXAMPLE SPC, ROBUSTNESS P2P LEAKAGE WILL BE TIGHTENED TO SHOW A GUARDBAND
CHECK AT END OF PROGRAM, DIB DIAGNOSTICS CPK OF 1 FOR BEST CONFIDENCE ON THIS GB
ETC. TECHNIQUE.
F. FIX TEST INSTABILITY OR LOW YIELD ISSUES, 5. DO GRADUAL TEMP INCREASE ON A SMALL
EXAMPLES PROBE TRIM SHIFTS LEADING TO SUBSET OF UNITS FOR REGENERATING
TARGET CHANGES , FRR FAILS THAT WILL FAIL GRAPHS TO FULL TEMP RANGE.
CURRENT ERTP SYSTEM FOR RELEASE.
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