Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems

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Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems
Qurzon: A Prototype for a Divide and Conquer Based Quantum
                                                            Compiler for Distributed Quantum Systems
                                                                                           Preprint, compiled September 16, 2021

                                                       Arnav Das                                 Turbasu Chatterjee                                  Shah Ishmam Mohtashim
                                                  Kazi Nazrul University           Maulana Abul Kalam Azad University of Technology                     University of Dhaka
                                                arnav.das88@gmail.com                     turbasu.chatterjee@gmail.com                                sishmam51@gmail.com

                                                                                                          Abstract
arXiv:2109.07072v1 [quant-ph] 15 Sep 2021

                                            When working with algorithms on quantum devices, quantum memory becomes a crucial bottleneck due to low qubit
                                            count in NISQ era devices. In this context, the concept of ‘divide and compute’, wherein a quantum circuit is broken into
                                            several subcircuits and executed separately, while stitching the results of the circuits via classical post-processing, becomes
                                            a viable option, especially in NISQ era devices. This paper introduces Qurzon, a proposed novel quantum compiler that
                                            incorporates the marriage of techniques of divide and compute with the state-of-the-art algorithms of optimal qubit
                                            placement for executing on real quantum devices. A scheduling algorithm is also introduced within the compiler that can
                                            explore the power of distributed quantum computing while paving the way for quantum parallelism for large algorithms.
                                            Several benchmark circuits have been executed using the compiler, thereby demonstrating the power of the divide and
                                            compute when working with real NISQ-era quantum devices.

                                            1   Introduction                                                       cussion. Section 5 depicts our concluding remarks with future
                                                                                                                   scope.
                                            Quantum Computing is the future promise of computing with
                                            far-reaching impacts in diverse scientific fields [1] [2] [3] [4].
                                            It should deliver speed up in many problems of those fields            2    Background
                                            ranging from machine learning [5] [6] to natural sciences [7].
                                            These absolute speedups will occur when large-scale, universal,        The circuit-based quantum computing model is one in which
                                            fault-tolerant quantum computers come into being. Till then,           operations are performed by a series of quantum gates that
                                            the challenge of the research community is to utilize currently        are always reversible. The quantum gates act on the prepared
                                            available noisy intermediate-scale quantum computers (NISQ)            initial qubit states sequentially, transforming the initial states
                                            era devices to their full potential [2]. These NISQ-era devices        through unitary transformation into the final state as dictated
                                            are bound by noise levels, limited coherence times of the qubits,      by the quantum operations. The final state is then measured to
                                            scalability, etc [8]. Thus, researchers are bound to only using        complete the computation procedure. This reversibility property
                                            small-scale quantum computers with limited and differing con-          makes it unique from classical computing. All quantum gates
                                            nectivity among qubits of different existing quantum devices.          are by-design unitary to ensure reversibility.
                                            For this reason, this paper proposes Qurzon: a divide and con-         Currently, the world has functional but small scale and imperfect
                                            quer based quantum compiler. The proposed quantum compiler             quantum computers are called Noisy intermediate scale Quan-
                                            attempts to make many exponential size problems tractable using        tum Computers (NISQ). Large-scale quantum computation is
                                            current NISQ-era quantum computers by cutting the quantum cir-         impossible in NISQ-era quantum computers due to the increase
                                            cuits for those problems to sub-circuits that fit the present device   of errors as the number of qubits is scaled up. The error propa-
                                            architectures. Extending that notion, Qurzon also implements           gates throughout the circuits as the number of qubits increases
                                            optimal qubit routing for these NISQ-era devices. The nature of        till it reaches a point when measurement on quantum computing
                                            NISQ-era devices is that each quantum device is characterized          becomes hugely unreliable to the point of being untenable. The
                                            by its inherent qubit connectivity or so-called qubit topology.        current research trend is to improve the existing faulty NISQ
                                            Qurzon considers these qubit topologies and implements an              devices so that they become viable for usage in the passing time.
                                            optimal qubit routing scheme for the subcircuits formed by the         Till the era of fault-tolerant computing starts, NISQ devices are
                                            cut algorithm.                                                         the only machines to test and build quantum algorithms.
                                            For this paper, the engineering of Qurzon, a combination of re-        Universal fault-tolerant quantum computing (FTQC) [3] [14]
                                            cursive circuit cutting and optimal qubit routing [9], is explained    [15] still requires years of research till they are realizable in real
                                            and implemented against existing circuit optimization methods.         life. FTQCs are large-scale quantum computers with a minimal
                                            A significant quantitative advantage is shown that makes Qur-          error rate and significant coherent time, ensuring a significant
                                            zon the state-of-the-art compiler amongst all existing ones found      quantum advantage over classical computing when they arrive.
                                            in literature [10] [11] [12] [13], thus improving on, and paving       Till then, NISQ devices are currently the best working model
                                            the way for future work on quantum multiprocessor computing.           of quantum computing we have, and all quantum algorithms
                                            The organization of the paper is as follows. A few preliminar-         are designed keeping the limitations of NISQ in mind. NISQ-
                                            ies of NISQ-era quantum computation are presented in Section           era computers are not changing the world right away, but it
                                            2. Section 3 illustrates the overview of the proposed compiler.        is a promise of the quantum advantage that is coming. These
                                            In Section 4, experimental results are exhibited with brief dis-       quantum computers have already some real-life applications that
Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                                2

                                                               (a)

                                       (b)                                                      (c)
Figure 1: The qubit topology and connectivities of (a) IBM Kolkata: A 27-qubit superconducting qubit quantum computer (b)
Google Sycamore: A 53-qubit superconducting qubit quantum computer (c) An 11-qubit IonQ trapped ion quantum computer.
Note that the IonQ device has full connectivity of all the qubits in its system, but some of these connectivities have high noise
levels.

give somewhat exploratory results for some problems [16] [17]        it shows how qubits are connected and this is something that the
[18] and a few quantum supremacy [19] [20] [21] examples have        compiler has to consider when transforming circuits to run in
also been shown in recent years.                                     devices. For example, if two qubits are not physically connected,
                                                                     a CNOT gate cannot be executed between the two qubits. It is
NISQ devices are made of qubits that are erroneous, unstable,
                                                                     not possible to run any circuit on a real device without rewriting
and have prepared states that decay over short periods [8] [22].
                                                                     the circuit to match the device topology of the intended device
Even the gate operations are faulty and prone to deviations
                                                                     to run on. This is part of a process called transpilation. So,
from actual results. Qubit stability error is called decoherence
                                                                     topology graphs play an important role when designing circuits
whereas gate operation error is known as fidelity. Due to these
                                                                     for algorithms in the NISQ era. The qubits on IBM hardware
errors, the quantum computing hardware cannot scale. Hence,
                                                                     are fixed. IBM uses superconducting transmon qubits rather
the term intermediate scale came into being. Each of these
                                                                     than trapped ion qubits. They don’t move around as trapped-
NISQ-era devices have particular topologies or connectivities
                                                                     ion qubit hardware. So, IBM Q quantum devices have limited
that acts as a characterization of these devices.
                                                                     connectivity among the qubits of the device. This property gives
The qubit topology graph of the device represents the qubit          rise to the optimal qubit mapping problem as elaborated in the
layout of the hardware. It shows how the physical qubits are         subsequent sections.
connected on the real device. The qubit topology for some
                                                                Due to noise, the depth and width of quantum circuits are limited.
devices are shown in Figure 1 [23].This graph is important when
                                                                The low depth and width of quantum circuits mean that the
a compiler tries to map a circuit to the quantum device because
                                                                capabilities of today’s NISQ machines are dependent on the
Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                             3

realization of hybrid algorithms. Hybrid algorithms contain
both quantum and classical computing parts. At present all
quantum algorithms follows this generic hybrid structure. The
quantum part is like any quantum algorithm: the initial state is
prepared, followed by unitary quantum gate operations, followed
by measurements of the final states. The final state is measured
by varying the input parameters of the quantum gate operations
through classical post-processing till the results improve to the
desired level.
Larger devices have significantly more noise than smaller ones.
Hence, cutting a large circuit into smaller sub-circuits seems to
be a way to realize better fidelity. Many seemingly intractable
problems for current NISQ-era devices are made possible by di-
viding the humongous problem-specific circuit into manageable
ones that the current architectures can run. This improves [24]
on the design of distributed quantum systems.
In a distributed quantum computing, multiple smaller non-local
quantum devices are connected coherently, with all the nodes
together working as a single large ecosystem of quantum compu-
tation. The number of qubits scales linearly with the number of
interconnected devices. Hence, distributed Quantum Computing
can act as an intermediate solution to the scaling-up problem.

3   Compiler Overview
In the previous sections, we have observed that the NISQ-era
devices are ones with low qubit count and high inherent device
noise. The depth of a circuit is the number of time-steps re-
quired, assuming that gates acting on distinct bits can operate
simultaneously (that is, the depth is the maximum length of a
directed path from the input to the output of the circuit) [25]. For
NISQ-era devices, as the depth of the quantum circuit increases,
the cumulative noise in the circuit also increases. The primary Figure 2: A high level overview of the Qurzon compiler, show-
objective of our proposed compiler architecture is to reduce the ing the different components and workflow
depth of the quantum circuit by employing a recursive circuit
cutting algorithm. This technique drastically reduces the size
of the circuit to be executed. This, however, comes at a cost:
The circuit reconstruction done as of now employs random shot             ranges them in a queue. It then takes into account the
sampling, thereby inducing finite sampling noise in the circuits.         available quantum devices in the device pool. Once
Qurzon tries to mitigate this noise by employing an optimal cut           done, it allocates the subcircuits as jobs to the avail-
level algorithm, which finds the optimal level of recursive circuit       able quantum devices based on a greedy algorithm and
cuts where the finite sampling noise is minimized, but maximiz-           passes it down to the next stage of the compilation
ing the number of fragmented circuits, for ease of execution.             process.
A diagrammatic overview of Qurzon’s components can be
found in Figure 2, which shall be briefly introduced here and           3. Optimal Qubit Routing: Once the scheduling algo-
elaborated on later in the subsequent subsections.                         rithm zeros in on a target quantum device to run the
                                                                           subcircuit, the optimal qubit routing algorithm takes
      1. Circuit Cutting Algorithm: One of the primary com-                into account the current device qubit topology. Once
         ponents of the Qurzon is the circuit cutting algorithm.           done, it optimally places the quantum gates associated
         This takes a large multiqubit (>2) circuit and uses the           with the logical qubits of the subcircuit onto the phys-
         CutQC [26] algorithm to find the optimal cut. The                 ical qubits of the device, minimizing the number of
         optimal cut finding is done using the Gurobi Solver               SWAP gates required in the process.
         with a mixed-integer programming formulation of the
         circuit’s directed acyclic graph (DAG). This circuit           4. Execution on Quantum Device and Subsequent Re-
         cutting is employed recursively in order to break the             construction: The circuits placed optimally on the
         circuit into multiple parts. Once done, it is passed on           quantum devices are then reconstructed using a shot-
         to the next part of the compiler.                                 based probabilistic sampling of conditional probabili-
      2. Scheduling Algorithm: This part of the algorithm                  ties. This gives us the final output of the final quantum
         takes the cut circuits from the previous step and ar-             circuit.
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                                                                                     4

3.1   Circuit Cutter                                                                        On inserting RI acting on the nth qubit qn and calculating the
                                                                                            probability:
The theory of circuit cutting has been first proposed in the paper
by Peng et.al. [27]. This section will be containing the mathe-
matical framework for the circuit cutting algorithm, as proposed
by Ayral et. al. [28] and thereafter, will be elaborating on the                               p(i) = 2m hhΠi | RAa f ter ◦ RBa f ter ◦ RI
                                                                                                                |{z}        |{z} |{z}
CutQC Algorithm [26] that Qurzon uses.                                                                                q0 ,...,qn−1   qn+1 ,...,qm−1      qn

                                                                                                                                                      ◦ RAbe f ore ◦ RBbe f ore | ρ0 ii
Circuit Bipartitioning                                                                                                                                  | {z } | {z }
                                                                                                                                                        q0 ,...,qn−1   qn+1 ...qm−1
The calculation is a summary of the calculation presented in
[28]. For further elaboration on this paper, the authors suggest                            On applying the decomposition of RI as given above:
referring to the original paper.                                                                            X X             0
                                                                                              p(i) = RI =              γαbb
An m qubit quantum circuit can be expressed as a composition
                                                                                                                       e
                                                                                                                  α=X,Y,Z bb0 ={0,1}
of superoperators as follows:
                                                                                                       × hhΠi | q0 ,...,qn−1 hhΠi | qn+1 ,...,qm−1 RAa f ter RBa f ter | σbα ii qn
                                                                                                                        0
                C = CAa f ter ◦ CBa f ter ◦ CAbe f ore ◦ CBbe f ore                                          × hhσbα | qn RAbe f ore RBbe f ore | ρ0 ii q0 ,...,qn | ρ0 iiqn+1 ,...qm−1

Here, the support of the super operators CAa f ter and CBa f ter is a Therefore, the final expression for the probabilities is given by:
bipartition of the quantum circuit. Similarly, the support of the
superoperators CAbe f ore and CBbe f ore also forms a bipartition of
                                                                                                1 X X bb0 α
the circuit i.e., without loss of generality, one can assume that         p(b̂0 . . . b̂m−1 ) =                      γ̃ p
the support of CAbe f ore refers to the qubits q0 , q1 , . . . , qm−1 and                       2 α=X,Y,Z bb0 ∈{0,1} α A
that of CBbe f ore refers to qm , qm+1 , . . . qn .                                                      (b̂0 . . . b̂n−1 ; b0 ) × pαb
                                                                                                                                    B (b̂n . . . b̂m−1 )
The final state of the circuit is given by the density matrix:
                                                                                            where, pαA (b̂0 . . . b̂n−1 ; b0 ) ≡ 2n+1 hhΠb̂0 ...b̂n−1 |hhσbα |qn RA |ρ0 iiq0 ...qn ,
                                                                                                                                                                       0

        ρ = C(ρ) =      CAa f ter   ◦   CBa f ter   ◦   CAbe f ore   ◦   CBbe f ore (ρ0 )   and,
                                                                                     αb
where ρ0 is the density matrix of the initial state. The prob- pB (b̂n . . . b̂m−1 ) ≡ 2 hhΠb̂n ...b̂m−1 |RB |σα iiqn |ρ0 iiqn+1 ...qm−1 ,
                                                                                                         m−n                 b

ability of measuring a state i with binary representation i = The circuit cutting algorithm automatically locates optimal posi-
(bˆ0 , bˆ1 , . . . bn−1
                     ˆ ) is given by:
                                                                                   tions to cut a large quantum circuit into smaller sub-circuits. The
                                 p(i) = T r[Πi · ρ]                                cutting algorithm is processed classically. This technique makes
                                                                                   it possible to simulate quantum algorithms for large problems,
where Πi is the projector on the state i(i = 0, . . . , 2m ).                      which would be otherwise impossible considering the current
                                                                                   device restrictions with scalability.There are many advantages to
Therefore,                                                                         circuit cutting. The solution state remains the same even as the
  p(i) = T r[Πi · C(ρ) = CA
                      †            a f ter     a f ter
                                           ◦ C B ◦ CA  be f ore    be f ore
                                                                ◦ CB        (ρ0 )] number of cuts increases. It is also relevant to tensor network
                                                                                   contraction methods.
as Π†i = Πi . Now if we switch to the Pauli basis, this results in
the expression:                                                                    3.2 Scheduling Algorithm

      p(i) = 2m hhΠi | RAa f ter ◦ RBa f ter ◦ RAbe f ore ◦ RBbe f ore | ρ0 ii For this work, the scheduling algorithm takes into account the list
                                                                               of available devices the subcircuits can be executed upon. The
         a f ter/be f ore
where RA/B                are the Pauli Transfer Matrices (PTM) repre- Scheduler algorithm allots the sub-circuits to different devices
sentation of the superoperators as given by:                                   (depending on their size and availability) while minimizing the
                                                                               loss of computational power and loss of time by making sure that
                                    1                                          most of the devices are used. The only function of the scheduler
                          [Rαβ ] = T r[Pα · C(Pβ )]                            algorithm is to find the optimal distribution of the sub-circuits
                                    d
                                                                               over the list of devices. This optimal distribution is attained by
where Pα is a generalised Pauli matrix acting on n qubits.                     first alloting all the subcircuits to the devices with strictly the
Now, the PTM representation of the Identity superoperator as same number of qubits. Once that is done, devices with most sub
follows:                    X X                                                circuits allotted to them are selected and some of their associated
                                                 0              0
                  RI =                       γαbb |σbα iihhσbα |,
                                             e                                 subcircuits are reassigned to the rest of unused devices to reduce
                           α=X,Y,Z bb ={0,1}
                                     0                                         the workload on the selected devices. This method of alloting
                                                                               the subcircuits to devices in an optimal way can be changed in
where |σbα ii are the (real) coordinates in the Pauli basis of the the future depending on other external parameters as well.
density matrix corresponding to the bth eigenvector |ψbα i of Pauli However, the authors of this paper propose using a parallelized
                                                     0        0
matrix σα . The e     γ tensor is given by e     γbb
                                                   X   =e γYbb = 2δbb0 − 1 and version of this scheduling algorithm that is to be implemented
    0
γZbb = 2δbb0 .
e                                                                              in the future iterations of this research.
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                              5

                        (a)                                           (b)                                  (c)

                        (d)                                           (e)                                  (f)
Figure 3: Cross-sectional view of the figures plotted from the results. The y-axis represents the difference E − E 0 , where E is the
mean squared error of the circuit without t|keti and E 0 is the mean squared error of the same using t|keti.The x-axis indicates the
size of the input circuit. The circuits used were (a) Grover’s algorithm (b) Approximated quantum fourier transform (AQFT) (c)
Quantum Fourier Transform (QFT) (d) Supremacy Circuit (e) Linear Supremacy Circuit (f) Random Circuit

3.3   Optimal Qubit Routing                                         connectivity of the devices are accounted for. This means that
                                                                    any two logical qubits that are adjacent may not be physically
As introduced in section 2, NISQ-era devices are inherently sus- adjacent to each other.
ceptible to noise. NISQ devices also have limited qubit connec- A viable solution to the problem of having non-adjacent in-
tivity; this is particularly prevalent not only in superconducting teracting qubits is to insert SWAP gates to exchange it with a
qubit architectures but also in trapped ion systems, as shown in neighbouring qubit, thereby moving it closer to the desired qubit
Figure 1. Although the qubits in the trapped ion systems appear position. As this method introduces new gates into the quantum
to be fully connected, something to keep in mind is that in such circuit, the depth of the circuit increases thereby compromising
architectures, the connectivity between the qubits is also prone the algorithm’s performance. This problem is called the qubit
to noise. This translates to the fact that not all connections have routing problem, wherein two desired qubits are made to inter-
the same fidelity. This limited connectivity in devices gives birth act with one another by minimizing the number of SWAP gates
to the optimal qubit routing problem.                               necessary to do so. This problem is shown to be equivalent to
The qubit routing problem is fundamental for circuit execution the token-swapping problem and is proven to be at least NP-hard
in NISQ-era devices. The motivation for the problem is to map and possibly PSPACE-complete [29].
a logical qubit, a qubit allocated in the circuit or the algorithm However, efforts have been made to design an exact solution
must translate directly to a physical qubit, a qubit on the actual to the qubit routing problem. Siraichi et al. [29] proposed a
quantum device. In doing so, the quantum circuit must go           dynamic programming method, resulting in a complexity that
through transpilation or a source-to-source translater. What       is exponential to the number of qubits, and a heuristic solution
this stage does is, taking a quantum circuit into account, the     that approximates solutions to small circuits reasonably well.
transpiler decomposes the same into an equivalent circuit with a   Zulehner et al. [30] proposed an algorithm that takes into ac-
set of gates that can be run on the quantum device. Something      count partitions based on the depth of the circuit and using the
to note is that the set of gates or the gate set is different for every
                                                                   A* algorithm to search for optimal solutions, specializing in
quantum device.                                                    IBM devices. There is considerable literature towards finding
Once the transpiler does its job, a set of gates is left behind to an optimal solution to this problem [31] [32] [33] , but here the
be executed on the device. These include single-qubit as well approach proposed by t|keti has been incorporated in Qurzon
as two-qubit gates. The single-qubit gates aren’t much of a con- as outlined below:
cern since they can be mapped to the individual physical qubits
with ease. However, to execute the two-qubit gates, the qubit
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                                 6

Optimal Layout Synthesis with t|keti                                 4.2   Results and Discussions

t|keti [9] [34] [35] is a language-agnostic optimising compiler      The results published herein are based on a limited number of
package that manages executable circuits and optimizes for phys-     qubits, with limited depth, due to computational power con-
ical qubit layout while also reducing the number of required         straints. However, keeping in mind, the prototypical nature of
operations. The system consists of two main components: a            this project, the results are sufficient to draw meaningful infer-
powerful optimizing compiler written in C ++, and a lightweight      ence, paving the way for future work in the field.
user interface and runtime system written in Python. The python
Interface is used to interact with a wide range of hardware, han-    On benchmarking several circuits, namely the Bernstein Vazi-
dle the full cycle of compilation, dispatch and results retrieval.   rani algorithm, Grover’s algorithm, the AFQT, the QFT, the
The compilation steps can be controlled via the interface to suit    supremacy circuit, the linear supremacy circuit and random cir-
the nature of the quantum circuit being run. t|keti deals with the   cuits, through the pipeline proposed in this paper, a general trend
qubit routing problem by using a heuristic method that produces      can be seen. The results of these benchmarks can be observed
optimal mapping systems in terms of depth, total gate count,         in Figure 3 and 4. The y-axis consists of the difference in the
and low run times. Circuit optimisation is especially pertinent      fidelities δF = (E − E 0 ), where E is the mean squared error of
on so-called noisy intermediate-scale quantum (NISQ) devices.        the circuit without subjecting it to a qubit mapping algorithm
The longer the computation runs, the more noise builds up. It is     and E 0 is the mean squared error of the circuit after t|keti was
specifically designed for NISQ devices, and includes features        applied. The x-axis consists of the number of qubits in the input
that minimise the influence of device errors on computation.         circuits.
t|keti routing algorithm ensures the compilation of any quantum  When the size of the input circuits is small, the δF tends to stay
circuit to any existing device as long as its architecture can benegative. This is because, when circuit size is small and the size
represented as a simple connected graph. The algorithm works     of the cut circuits are small, the number of cuts in the circuits
in four parts: decomposing the input circuit into timesteps; ini-are minimal. The cut circuits are then optimally routed using
tial mapping; routing across timesteps; and swap synthesis and   the t|keti module. On the control side of these experiments, the
final rewriting based on device architecture constraints.        optimal layout synthesis module was not used. It was noted that
                                                                 at these levels, optimal qubit mapping plays a significant role in
                                                                 mitigating the finite sampling noise, found as a result of circuit
3.4 Stitching Quantum Circuits Post Execution                    reconstruction. At large qubit counts, with cut size remaining
                                                                 constant, the reconstruction noise is great enough to nullify the
Circuit reconstruction/stitching is a classical post processing effects of the qubit mapping.
method that can reconstruct the output of the original circuit.
It reconstructs the probability distribution over measurement This is an important observation because although due to com-
outcomes for the original quantum circuit from probability dis- putational constraints large circuits could not be simulated, a
tributions associated with the sub-circuits. The circuit recon- hypothesis can be reached, and can be explored further in future
struction process has a low computational cost that makes the iterations of this research. The hypothesis is that when large
whole algorithm a practical alternative strategy for large quan- circuits can be made to run through the compiler, with large
tum simulations.                                                 enough cut circuit size (say, equal to the size of device register),
                                                                 qubit routing is to play a pivotal role in mitigating circuit recon-
                                                                 struction noise, thereby significantly improving the fidelity of
                                                                 the circuits formed after reconstruction.
4     Experimental Results
4.1   Experimental Setup

The workflow for the "control system" i.e., running the circuits
without using optimal layout synthesis is as follows: The cir-
cuits were generated using the code for the helper function in
Wei Tang’s CutQC paper [26]. Mock backends were taken from
the IBM Qiskit Aer simulator library [36]. The backends used
were Fake Tokyo, Fake Tenerife, Fake Melbourne, Fake Vigo,
Fake Rueschlikon and Fake Poughkeepsie. Noise models for
the respective backends were used and subjected to the schedul-
ing algorithm. The circuit cutter used Gurobi’s mixed integer
programming solver and used 8192 shots for the reconstruction
phase. Once the cut circuits have been run on the respective
backends, they are reconstructed and their fidelities are noted.
For the "experiment workflow" all the steps in the previous para-
graph were done except when using the backends. Herein, the
t|keti backends were used from t|keti IBM extension package.
Here, t|keti implements optimal layout synthesis while running
the cut circuits and uses CutQC’s reconstruction methods and Figure 4: A comparison of the χ error of the CutQC circuits
                                                                                                    2

generates the respective fidelities.                              with and without t|keti for the Bernstein Vazirani algorithm
– Qurzon: A Prototype for a Divide and Conquer Based Quantum Compiler for Distributed Quantum Systems                                                7

Furthermore, the depth of the quantum circuit plays minimal                         called transpilation and is handled by a piece of software called
impact on the fidelity, with or without the qubit routing scheme.                   the transpiler. At the hardware level, therefore, the fidelity of
This is due to the depth-agnostic nature of the t|keti algorithm.                   the circuit is dependent on the types of gates that the circuit
However depth-aware mapping techniques maybe used in future                         uses. Specifically, at the juxtaposition of logic synthesis and
iterations of this research in order to study the depths therein.                   execution, the two-qubit gates are responsible [38] [39] [40]
Furthermore, it remains to be seen if the depth can be reduced                      [41] [42] for the fidelity of the quantum circuits. The two-qubit
effectively by using techniques similar to CutQC [26]. Such to-                     gates are also the motivation behind the optimal qubit mapping
mography inspired techniques have been implemented by Perlin                        problem for NISQ-era devices.
et. al. [37] but remains to be studied for general circuits.
                                                                                    The beauty of Qurzon is that due to the circuit cutting techniques,
                                                                                    the number of two-qubit gates in the circuit is highly diminished
Running time of the circuits                                                        when the size of the qubit register of the quantum device is small.
                                                                                    The tradeoff, however, lies in the fact that whenever the size
This section attempts to provide a formalism regarding the run-                     of the qubit register for the cut circuits is low, the time taken
ning times of the circuits on Qurzon, as it stands, in the latest                   for classical post-processing, exponentially increases. This has
iteration. This formalism is heavily dependent on the CutQC                         been shown by Tang et. al. in the CutQC paper [26]. Not
algorithm and the availability of quantum devices along with                        only that, the reconstruction noise after execution for several
classical resources.                                                                of these minuscule circuits exceeds the noise induced by these
For this analysis, n quantum subcircuits, post circuit cutting, are                 two-qubit gates. The authors of this paper, therefore, feel, that
to be considered to be allocated to run on k quantum devices.                       it is imperative for the reconstruction methodology for these
Instead of queuing the quantum circuits, the authors herein                         subcircuits to be improved upon such that the probability land-
propose running the circuits parallelly on the quantum devices,                     scape of large circuits can be calculated effectively, swiftly and
subject to device availability. Let S k denote the kth quantum                      reliably. This point also remains to be worked on by the authors,
processor, that is available to be used and t(S k ) denote the time                 in the successive iterations of this project.
taken to run the circuit on the kth quantum processor. Without
loss of generality, it is assumed that n > k. The time taken
for classical post processing is considered as C(S i ) for the ith                  5   Conclusion and Future Scope
subcircuit.
                                                                                    This piece of work introduces Qurzon, a novel approach to
The time, therefore, taken for thePclassical post processing of                     compiling and executing circuits on NISQ era devices. It also
the n subcircuits is given by T c = ni=1 C(S i ).                                   studies the effects of qubit routing on the quantum divide and
                                                                                    compute approach. It is noted that for sufficiently large circuits,
The time taken for the circuits to be executed on the quantum
                                                                                    qubit routing plays a major role in determining the circuit’s
processor be given by T q = max(t(S 1 ), t(S 2 ), . . . , t(S n )). This is
                                                                                    fidelity after being subjected to the cut and execute methodology.
due to Qurzon’s proposed scheduling algorithm that shall allow
                                                                                    Furthermore, this work proposes the use of parallel scheduling
for the parallel execution of these subcircuits.
                                                                                    algorithms for quantum multi-computing. The work proposed
Since n > k, it might be that some subcircuit might require                         herein is to be extended to include devices from multiple vendors
some wait time before some quantum device is allocated. This                        such as Google, IBM, Rigetti, Xanadu, IonQ etc. The authors
wait time is characterised by W(S i ) for the ith subcircuit in                     of this paper are currently investigating methods to cut down
waiting. Note that W(S i ) can be zero, for the circuits that can be                circuit depth that is to be integrated in future iterations of this
associated with a P
                  quantum processor. Hence, the total wait time                     work.
is given by T w = ni=1 W(S i ).
Therefore, the total time taken for the end to end execution                        References
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