Intel-based Products - Enclustra Catalogue 2017
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Intel-based Products
Catalogue 2017
Mercury+ AA1. Floating point
everything, with Arria® 10.
Everything
FPGA.
Everything FPGA. At Enclustra, everything is FPGA Our products are used by more than a thousand customers in more than 50 countries worldwide, and our customer base is still growing quickly But we don’t just stick to hardware and IP – we do customer design projects too; every stage of development, from conception through to bring-up at the customer site We have 13 years of FPGA system design under our belt; break it down a little further and our team of engineers has far in excess of 204 person years of FPGA experience That experience and expertise enables us to create the best experience for our customers: we pride ourselves on the quickest, highest possible quality of service and delivery from the moment you get in touch, to the moment your system starts up in the field for the first time As with our product range and our customer base, our list of completed projects is growing – to keep up with developments, and not miss any of our upcoming innovations, subscribe to our newsletter at www.enclustra.com/subscribe This catalogue presents our current product and service range; if anything piques your interest, don’t hesitate to get in touch Thanks and happy reading! The Enclustra Team.
Co n te n t s
About Enclustra���������������������������������������������������������������������������������������� 4
What we offer�������������������������������������������������������������������������������������������� 5
Design Services Our core competencies�������������������������������������������������������������������������� 6
Main application areas��������������������������������������������������������������������������� 7
Digital signal processing������������������������������������������������������������������������ 8
Example project #1: PCIe to Wishbone bridge������������������������������ 9
Example project #2: Signal generator afterburner���������������������10
Example project #3: CPLD replacement�����������������������������������������11
Our development process������������������������������������������������������������������12
Hardware Products Our hardware products������������������������������������������������������������������������14
Modules Module overview������������������������������������������������������������������������������������15
Mars MA3��������������������������������������������������������������������������������������������������16
Mercury CA1���������������������������������������������������������������������������������������������17
Mercury SA1���������������������������������������������������������������������������������������������18
Mercury+ AA1������������������������������������������������������������������������������������������19
Mercury+ SA2������������������������������������������������������������������������������������������20
Selection Guides Mars modules selection guide����������������������������������������������������������22
Mercury modules selection guide���������������������������������������������������24
Base Boards & Other Mercury+ PE1�������������������������������������������������������������������������������������������28
Mars EB1����������������������������������������������������������������������������������������������������29
Mars PM3���������������������������������������������������������������������������������������������������30
FMC DR2����������������������������������������������������������������������������������������������������31
Tools & Design Support Linux Build Environment���������������������������������������������������������������������32
Module Configuration Toolkit������������������������������������������������������������33
Design Support���������������������������������������������������������������������������������������34
IP Solutions Our IP solutions���������������������������������������������������������������������������������������35
Universal Drive Controller�������������������������������������������������������������������36
FPGA Manager�����������������������������������������������������������������������������������������38
UDP/IP Ethernet��������������������������������������������������������������������������������������39
Stream Buffer Controller����������������������������������������������������������������������40
Display Controller�����������������������������������������������������������������������������������41
Contact Contact us�������������������������������������������������������������������������������������������������42
Further information�������������������������������������������������������������������������������43
About Enclustra
The company was founded in 2004 We currently have 33 people in our
by Martin Heimlicher, with the aim team, of 10 different nationalities, and
of providing comprehensive FPGA we’re growing
solutions, from design through to
production
Our headquarters are located in In addition to our main office, we have
the thriving Binz quarter in Zürich, sales and support offices in Germany,
Switzerland – an ideal location in one of the USA and China
the world’s leading cities for technology
and innovation
Demand for our design services, FPGA modules and
base boards is growing – our current customer base
stands at over 1000 customers in over 50 countries,
and continues to expand
4
W H A T
W E
O F F E R
Everything from the drawing board. Everything off the shelf.
FPGA Design Center FPGA Solution Center
Our design center offers design and We develop and sell our own FPGA and
support in all areas of FPGA-based system system-on-chip modules, based on Intel®
development, in a wide number of devices, for our customers to integrate into
applications their own systems
High-speed hardware, HDL firmware, 19 different modules, in 3 different families,
embedded software, real-time operating compatible with 3 different base boards – the
systems – our expertise covers every stage of diversity of our products allows the customer
the design process, from specification up to to select exactly the features and they need,
industrialization and manufacturing down to a fine grain
We’re vendor-independent, and we’re design service partners of Intel – this close communication allows us
to be forward-looking in our design process, and remain on the cutting edge of the most advanced FPGA
technology
5
FPGA HDL Development
• Systems at the technical limits (complexity,
bandwidth, processing power, latency)
• Integration of microcontrollers and peripherals
• Thorough verification and continuous integration
• HLS or HDL design entry
FPGA Hardware Development
re Compete
• Multi-layer PCB design
Co •
•
Multi-gigabit serial links
High-speed data converters
• RF front ends
r
nc
» Ou
ies
Digital Signal Processing
• Bit-true MATLAB/Simulink to VHDL conversion
• Resource-optimized implementation
• Software defined radio (channel filtering, sample
rate conversion, modulation/demodulation, etc)
Software Development
• Embedded software for SoC and soft core processors
• Real-time control loops
• Linux BSPs and device drivers
• Host computer software as user interface to FPGA-based
systems
6
FPGA DESIGN Center
We carry out customer projects in a wide
»Main Application Areas array of application fields – below are some of
the areas we’re particularly experienced in
WIRED NETWORKS AND SWITCHING (ETHERNET)
INDUSTRIAL COMMUNICATION (PROFINET/CAN)
WIRELESS COMMUNICATION (SOFTWARE DEFINED RADIO)
EMBEDDED INTERFACES (PCIE, USB, AXI, ETC.)
DRIVE AND MOTION CONTROL
COMPUTER VISION AND SMART CAMERAS
TEST AND MEASUREMENT / DATA ACQUISITION
WAVEFORM SYNTHESIS
FPGA DESIGN Center 7
» D igi t a l S i gn a l Pro ces s i n g
Manual, bit-true HDL implementation.
Do you have a MATLAB® implementation of a signal processing algorithm and need a
best performance, lowest resource usage and lowest power FPGA implementation? Our
engineering team has successfully completed a significant number of such projects with
the help of our fixed-point arithmetics library
Our cl_fix library implements basic to medium-complexity fixed-point arithmetic
functions in MATLAB and VHDL The implementations of the same function in MATLAB
and VHDL show exactly the same, bit-accurate behavior The functions operate on the
native data types of the individual languages; ie double for MATLAB and
std_logic_vector for VHDL, and are thus easy to use The bit-true behavior is enabled by
associating a fixed-point format to every operand and result
We take care of the algorithm’s FPGA-optimization, and work with you to ensure that
the FPGA-optimized MATLAB algorithm still meets your requirements After that, it’s a
straightforward path to a bit-true FPGA implementation, without any lengthy and costly
iterations back through the algorithm design and optimization phases
Model-based design and automated HDL code generation.
If traceability or time to market is the main concern for the FPGA implementation of your
MATLAB/Simulink signal processing algorithm, model-based design and automated HDL
code generation might also be a useful option
We’re a member of MathWorks’ partner program, and our engineering team has the
relevant expertise to efficiently employ automated code generation tools like MathWorks
HDL Coder, Intel® DSP Builder (Simulink) and alike
As an additional benefit, your application specialists – who not necessarily are FPGA
experts – are able to develop your FPGA’s signal processing units in their known
environment and programming language, while we take care of the communication
infrastructure and interfaces
8
FPGA DESIGN Center
FPGA DESIGN Center
Example project #1
PCI Express to Wishbone bridge
Abstract We were asked to migrate the SPI slave interfaces of an existing
FPGA design to PCIe interfaces providing massively more
bandwidth, while maintaining the FPGA-internal Wishbone
communication infrastructure and as much as possible of the
embedded software controlling the SPI masters
Subsequently, we replaced the SPI slave interfaces with a multi-
function PCIe endpoint with attached Wishbone masters and
mapped the new FPGA design to an Altera® Cyclone® V GX
device In addition to the Wishbone masters, a sophisticated
DMA engine, which takes care of the higher-bandwith data
transfers, was developed On the embedded software side,
the low-level SPI driver was replaced by a tailored PCIe driver,
emulating the same behavior
This development provides our customer with a smooth
transition to the latest FPGA technology and delivers the
performance required for their next-generation systems
Employed Technologies Altera Cyclone V | PCI Express | Wishbone | DMA | VHDL
Involved Enclustra Services FPGA System Design | FPGA HDL | Embedded Software
9
FPGA DESIGN Center
Example project #2
Signal generator afterburner
Abstract For a measurement device producer, we developed an
extremely flexible signal generator during a previous project
After seeing the power and possibilities offered by FPGA
technology, the customer came to us with further ideas to make
the generator even more adaptable
The features to be added to the existing system are best
described by complex cyclical signal repetition and
measurement of the wobble frequency of the generated signals
Thanks to the modular VHDL code and the already existing unit
and top-level regression tests, it was fairly simple to integrate
the additional functionality and deliver a reliable system with
stunning new features
Employed Technologies Altera® Cyclone® III | DDR SDRAM | SRAM | VHDL
Involved Enclustra Services FPGA System Design | FPGA HDL
10FPGA DESIGN Center
Example project #3
CPLD replaces discontinued IC
Abstract What do you do when a chip you’re using is discontinued and
you don’t want to change your PCB layout? This tricky question
is one that one of our customers came to us with, for a keypad
encoder system
Luckily, the chip housing was the “outdated” dual in-line (DIL)
package - this allowed us to use a CPLD in a compact ball grid
array package to reproduce the same functionality, and then
pack it into the same DIL form factor
A small PCB accommodates the CPLD and DIL pin headers, and
then slots seamlessly into the mainboard - without any PCB
layout changes
Employed Technologies Altera® MAX® V | VHDL
Involved Enclustra Services FPGA System Design | FPGA Hardware | FPGA HDL
11»Our Development Process
Requirements
Engineering
Concept
Engineering
Free Commercial
Offer Creation
Purchase Order
Project
Preparation
Detailed HDL
Design
HDL
Implementation
HDL Integration
& Test
System
Integration
& Test
System
Deployment
Customer Acceptance
System
Maintenance
12 FPGA DESIGN CenterIt pays to stay informed.
Things move fast, round these parts Keep up to date on our latest
customer projects, and find out about our newest hardware and IP
products, by subscribing to our newsletter at enclustra.com/subscribe
In return, out of the kindness of our hearts, we’ll give you a 10% discount
on your next hardware kit purchase
13Enclustra hardware.
Delivered fast;
made to last
Our modules all come with a minimum
expected lifetime of 10+ years; seeing as we
also design our hardware with forward-looking
availability and performance in mind, this
means you can depend on our products to
deliver over the long term
Our modules are also largely pin-compatible
within their module family, meaning you can
also plan a clear upgrade path A full selection
guide and roadmap can be found after the
individual module info pages
In the case that you wish to manufacture our
products by yourself, we also offer a hardware
production licence Get in touch for more
details
14
FPGA SOLUTION Center»Module Overview
Mars form factor. A family of modules in the compact and popular SO-DIMM
form factor
Module FPGA/SoC Device User I/Os System Logic Cells
Mars MA3 Cyclone V SoC Up to 104 Up to 110k
Mercury form factor. A family of modules optised for demanding, high-band-
width applications
Module FPGA/SoC Device User I/Os System Logic Cells
Mercury CA1 Cyclone IV 146 Up to 114k
Mercury SA1 Cyclone V SoC 178 Up to 110k
Mercury+ form factor. The raw computing power of the Mercury family, with
an even higher I/O count
Module FPGA/SoC Device User I/Os System Logic Cells
Mercury+ AA1 Arria 10 286 Up to 629k
Mercury+ SA2 Cyclone V SoC 294 Up to 110k
FPGA SOLUTION Center 15MARS MA3
Cyclone® V SoC Module
Altera® Cyclone V SoC
Dual-core ARM Cortex-A9
Up to 2 GB DDR3L SDRAM
16 GB eMMC flash Pricing
64 MB QSPI flash MA-MA3-A4-8C-D10
PCIe Gen1 ×2 (SX SoC only) 1+ €178
Up to 2 × 3125 Gpbs MGT 100+ €157
OS support: 10000+ €95
Gigabit Ethernet, Fast Ethernet
Mars EB1 Kit €416
USB 20 MA-MA3-C6-7I-D10
Up to 110,000 system logic elements 1+ €271
Up to 104 user I/Os 100+ €239
33 V single supply 10000+ €148
676 × 30 mm SO-DIMM Mars EB1 Kit €509
Mars MA3 eMMC
HPS Flash
DDR3L 32-bit
SDRAM FPGA/HPS
Gigabit
FPGA/HPS
Ethernet
PHY
Fast
Ethernet FPGA USB 2.0
PHY HPS PHY
2 MGTs
Power1.8V (PCIe Gen1 x2) Quad SPI
Supply
FPGA Flash
FPGA HPS
3.3V 2.5V 76 I/Os 16 I/Os Configuration,
(3.3V) (3.3V) JTAG, I2C
16MERCURY CA1
Cyclone® IV FPGA Module
Altera® Cyclone IV FPGA
Up to 256 MB DDR2 SDRAM
16 MB QSPI flash
USB 20 device
Pricing Gigabit Ethernet
MA-CA1-30-8C-D7 MA-CA1-75-8C-D7
Up to 114,480 system logic ele-
1+ €223 1+ €333 ments
100+ €183 100+ €275 146 user I/Os
10000+ €99 10000+ €160 5-15 V single supply
Mercury+ PE1 Kit € Mercury+ PE1 Kit €722 56 × 54 mm
168-pin Hirose FX10 Connector
65 I/Os
(3.3V)
Mercury CA1
DDR2 Gigabit
16-bit
SDRAM Ethernet
PHY
50 MHz
Clock
8-bit
FTDI
3 LEDs USB 2.0
Power
2.5V SPI Flash
Supply 3.3V
81 I/Os I2C, JTAG,
(3.3V) Configuration
5-15V
168-pin Hirose FX10 Connector
17MERCURY SA1
Cyclone® V SoC Module
Altera® Cyclone V SoC FPGA
Dual-core ARM Cortex-A9
Up to 4 GB DDR3L SDRAM
64 MB QSPI flash
PCIe Gen1 ×4
6 × 3125 Gbps MGT
USB 20
Gigabit Ethernet
Up to 110,000 system logic elements
178 user I/Os
5-15 V single supply
56 × 54 mm
Pricing
ME-SA1-C5-8C-D10 ME-SA1-C6-7I-D10
OS support: 1+ €201 1+ €286
100+ €178 100+ €253
10000+ €107 10000+ €161
Mercury+ PE1 Kit €501 Mercury+ PE1 Kit €586
168-pin Hirose FX10 Connector
6 MGTs 84 I/Os
(PCIe Gen1 x4) (3.3V)
Mercury SA1
FPGA FPGA
Gigabit
HPS Ethernet
DDR3L 32-bit PHY
SDRAM FPGA/HPS
USB 2.0
HPS PHY
Real-time Quad SPI
Clock Flash
FPGA HPS
1.8V
Power 3.3V
Supply 2.5V
16 I/Os I2C, JTAG,
50 I/Os
(3.3V) (3.3V) Configuration
5-15V
168-pin Hirose FX10 Connector
18MERCURY+ AA1
Arria® 10 SoC Module
Intel® Arria 10 SoC
Dual-core ARM® Cortex®-A9
Up to 8 GB DDR4 ECC SDRAM
64 MB QSPI flash
16 GB eMMC flash
PCIe® Gen3 ×8
12 × 103125/125 Gbps MGT OS support:
USB 30 device
USB 20 Pricing
Gigabit Ethernet ME-AA1-270-3E4-D11E ME-AA1-480-1E2-D12E
Up to 629,000 system logic elements 1+ €492 1+ €885
286 user I/Os 100+ €415 100+ €766
5-15 V single supply 10000+ €266 10000+ €518
74 × 54 mm Mercury+ PE1 Kit €938 Mercury+ PE1 Kit €1331
168-pin Hirose FX10 Connector
8 MGTs 72 I/Os
Real-time (PCIe Gen3 ×8) (1.8V)
Clock Mercury+ AA1
FPGA FPGA
Gigabit
168-pin Hirose FX10 Connector
DDR4 ECC 40-bit Ethernet
SDRAM FPGA/HPS
HPS
PHY
4 MGTs (PCIe Gen3 ×4)
FPGA
48 I/Os (1.8V)
FPGA USB 2.0
44 I/Os (1.8V)
FPGA
HPS PHY
Cypress FX3 eMMC
USB 3.0 Flash
1.8V HPS
Power Quad SPI
3.3V
Supply FPGA
Flash
HPS
5-15V 48 I/Os 18 I/Os I2C, JTAG,
(1.8V) (1.8V) Configuration
168-pin Hirose FX10 Connector
19MERCURY+ SA2
Cyclone® V SoC Module
Altera® Cyclone V SoC
Dual-core ARM Cortex-A9
Up to 4 GB DDR3L SDRAM
64 MB QSPI flash
PCIe Gen1/Gen2 ×4
OS support: 9 × 3125/6144 Gbps MGT
USB 30 device
Pricing USB 20
ME-SA2-C5-8C-D10 ME-SA2-D6-7I-D11
Gigabit Ethernet, 2 × Fast Ethernet
1+ €309 1+ €417 Up to 110,000 system logic elements
100+ €254 100+ €347 294 user I/Os
10000+ €154 10000+ €221 5-15 V single supply
Mercury+ PE1 Kit €755 Mercury+ PE1 Kit €863 74 × 54 mm
168-pin Hirose FX10 Connector
8 MGTs 74 I/Os
Real-time (PCIe Gen2 ×4) (3.3V)
Clock Mercury+ SA2
FPGA FPGA
Gigabit
168-pin Hirose FX10 Connector
DDR3L 32-bit HPS Ethernet PHY
FPGA/HPS
SDRAM
Fast Ethernet
FPGA PHY (×2)
1 MGT
FPGA
80 I/Os (3.3V)
FPGA
32 I/Os (3.3V)
FPGA
USB 2.0
Cypress FX3 HPS PHY
USB 3.0
1.8V FPGA
Quad SPI
Power 3.3V Flash
Supply 2.5V
48 I/Os 18 I/Os I2C, JTAG,
(3.3V) (3.3V) Configuration
5-15V
168-pin Hirose FX10 Connector
20Need some tweaks?
If you find that one of our modules almost
meets your needs, but you have different
interfacing or device needs, let us know –
we may be able to work together to rustle
up some custom hardware.
21Mars Modules Selection Guide
Valid as of 13th March 2017 Mars™ MA3
FPGA Family Cyclone® V SE Cyclone® V SX
FPGA Device Name A4 A5 C5 C6
FPGA Speed Grade*2 8 7 8 7
5CSEBA4 5CSEBA5 5CSXFC5C6 5CSXFC6C6
FPGA Part Number* 2
U23C8N U23I7N U23C8N U23I7N
CPU Cores 2 × ARM® Cortex™-A9
CPU Frequency @ MHz 600 800 600 800
HPS Cores & Peripherals 2 × CAN
HPS Ethernet | USB 1 Gbps | USB 20 OTG
HPS SDRAM Size (MByte) 1,024
HPS SDRAM Type | Bandwidth (MByte/s) DDR3L | 3,200
FPGA System Logic Elements 40,000 85,000 110,000
FPGA Block RAM (kbit) 2,700 3,970 5,570
FPGA DSP Systolic FIR (MMAC/s) 67 87 70 112
FPGA MGT Transceivers @ Gbps*6 N/A 2 @ 3125
FPGA Peripherals N/A PCIe Gen1 ×2
FPGA Ethernet | USB*5 1 Gbps + 100 Mbps
FPGA SDRAM Size (MByte) -
FPGA SDRAM Type | Bandwidth (MByte/s) -
Flash Memory 64M QSPI | 16G eMMC
Connector Pins | IO Pins 200 | 96 200 | 104
FPGA 3.3V | FPGA 1.8V Pins | HPS Pins 80 | - | 16 76 | - | 16
Module Dimensions (mm) 676 × 30
Temperature Range*2 0+70°C -40+85°C 0+70°C -40+85°C
Boot Modes QSPI | SD Card | eMMC | Passive Serial
Product Status Sampling
Estimated Product Lifetime*3 2030+
Preferred Configuration | MOQ*4 No | 120 No | 90 No | 100 Yes
MA-MA3-A4- MA-MA3-A5- MA-MA3-C5- MA-MA3-C6-
Module Order Code
8C-D10 7I-D10 8C-D10 7I-D10
Budgetary Price 1+ (EUR) 178 240 229 271
Budgetary Price 30+ (EUR) 167 217 208 254
Budgetary Price 100+ (EUR) 157 194 187 239
Budgetary Price 1000+ (EUR) 127 151 144 199
Budgetary Price 10000+ (EUR) 95 113 104 148
* Notes:
1 We are actively looking for customers interested in this or a similar module Please contact us with your detailed requirements
2 The module is also available in different speed and temperature grades Visit the product web page for more information
3 Please contact us about production data backup and module production licence options
4 For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock - please get in touch for more
details
5 Our FPGA Manager IP Solution offers simple data streaming to/from Windows/Linux/Embedded Linux hosts
6 Adequate signal integrity over the full signal path must be ensured when using MGTs at high performance rates
22Cyclone V SoC and Cyclone 10 modules
Mars™ MA7
Cyclone® 10 GX
85 220
6 5
10CX085Y 10C×220
U19E6G U19I5G
-
-
-
-
-
-
85,000 220,000
5,820 11,740
TBD
4 @ 50
PCIe Gen2 ×2
1 Gbps
1,024 2,048
DDR3L | 6,400
64M QSPI
200 | 108
- | 88 | -
676 × 30
0+85°C -40+85°C
QSPI | Passive Serial
Advance*1
TBD
TBD
MA-MA7-85- MA-MA7-220-
6E-D10 5I-D11
TBD TBD
TBD TBD
TBD TBD
TBD TBD
TBD TBD
General notes:
• Not all features are available simultaneously - please check the documentation for any applicable constraints
• All specifications and release dates are subject to change without notice Please verify component specifications with vendor’s datasheets
• Enclustra maintains an errata and revision history document for each product Please also check the errata of the FPGA device and other
components
• All prices are non-binding estimates – please contact us for definitive pricing and lead-time information
• Pricing during sampling starts significantly higher and decreases with time Budgetary pricing typically starts 12 months after production FPGAs
are available
• All trademarks are the property of their respective owners All prices do not include shipping, taxes and duties
23Mercury Modules Selection Guide (1)
Valid as of 13th March 2017 Mercury™ CA1
FPGA Family Cyclone® IV E
FPGA Device Name 30 75 115
FPGA Speed Grade*2 8
EP4CE30 EP4CE75 EP4CE115
FPGA Part Number*2
F23C8N F23C8N F23I7N
CPU Cores -
CPU Frequency @ MHz -
HPS Cores & Peripherals -
HPS Ethernet | USB -
HPS SDRAM Size (MByte) -
HPS SDRAM Type | Bandwidth (MByte/s) -
FPGA System Logic Elements 28,848 75,408 114,480
FPGA Block RAM (kbit) 594 2,745 3,888
FPGA DSP Systolic FIR (MMAC/s) 13 40 53
FPGA MGT Transceivers @ Gbps*6 -
FPGA Peripherals -
FPGA Ethernet | USB*5 1 Gbps | FTDI USB 20
FPGA SDRAM Size (MByte) 128 256
FPGA SDRAM Type | Bandwidth (MByte/s) DDR2 | 666
Flash Memory 16M SPI
Connector Pins | IO Pins 336 | 146
FPGA 3.3V | FPGA 1.8V Pins | HPS Pins 146 | - | -
Module Dimensions (mm) 56 × 54
Temperature Range*2 0+70°C -40+85°C
Boot Modes Passive Serial | Active Serial | USB2
Product Status Mass Production
Estimated Product Lifetime*3 2020+
Preferred Configuration | MOQ*4 Yes Yes No | 50
ME-CA1-30- ME-CA1-75- ME-CA1-115-
Module Order Code
8C-D7 8C-D7 7I-D8
Budgetary Price 1+ (EUR) 223 333 511
Budgetary Price 30+ (EUR) 203 304 465
Budgetary Price 100+ (EUR) 183 275 422
Budgetary Price 1000+ (EUR) 140 219 335
Budgetary Price 10000+ (EUR) 99 160 239
* Notes:
1 We are actively looking for customers interested in this or a similar module Please contact us with your detailed requirements
2 The module is also available in different speed and temperature grades Visit the product web page for more information
3 Please contact us about production data backup and module production licence options
4 For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock - please get in touch for more
details
5 Our FPGA Manager IP Solution offers simple data streaming to/from Windows/Linux/Embedded Linux hosts
6 Adequate signal integrity over the full signal path must be ensured when using MGTs at high performance rates
24Cyclone V SoC and Cyclone IV modules
Mercury™ SA1 Mercury+™ SA2
Cyclone® V SX Cyclone® V SX Cyclone® V ST
C5 C6 C5 D6
8 7 8 7
5CSXFC5C6 5CSXFC6C6 5CSXFC5D6 5CSTFD6D5
U23C8N U23I7N F31C8N F31I7N
2 × ARM® Cortex™-A9 2 × ARM® Cortex™-A9
600 800 600 800
2 × CAN 2 × CAN
1 Gbps | USB 20 OTG 1 Gbps | USB 20
1,024 1,024 2,048
DDR3L | 3,200 DDR3L | 3,200
85,000 110,000 85,000 110,000
4,800 5,140 4,800 5,140
70 90 70 90
6 @ 3125 9 @ 3125 9 @ 6144
PCIe Gen1 ×4 PCIe Gen1 ×4 PCIe Gen2 ×4
- 2 × 100 Mbps | Cypress FX3™ USB 30
- -
- -
64M QSPI 64M QSPI
336 | 178 504 | 294
134 | - | 16 234 | - | 18
56 × 54 74 × 54
0+70°C -40+85°C 0+70°C -40+85°C
QSPI | SD Card | Passive Serial QSPI | SD Card | Passive Serial | USB3
Mass Production Mass Production
2030+ 2030+
No | 110 Yes No | 70 Yes
ME-SA1-C5- ME-SA1-C6- ME-SA2-C5- ME-SA2-D6-
8C-D10 7I-D10 8C-D10 7I-D11
201 286 309 417
190 269 281 381
178 253 254 347
145 212 202 285
107 161 154 221
General notes:
• Not all features are available simultaneously - please check the documentation for any applicable constraints
• All specifications and release dates are subject to change without notice Please verify component specifications with vendor’s datasheets
• Enclustra maintains an errata and revision history document for each product Please also check the errata of the FPGA device and other
components
• All prices are non-binding estimates – please contact us for definitive pricing and lead-time information
• Pricing during sampling starts significantly higher and decreases with time Budgetary pricing typically starts 12 months after production FPGAs
are available
• All trademarks are the property of their respective owners All prices do not include shipping, taxes and duties
25Mercury Modules Selection Guide (2)
Valid as of 13th March 2017 Mercury+™ AA1
FPGA Family Arria® 10
FPGA Device Name SX 270 SX 270 SX 480 SX 480
FPGA Speed Grade*2 3 2 1 2
10AS027E4 10AS027E2 10AS048E2 10AS048E3
FPGA Part Number* 2
F29E3SG F29I2SG F29E1HG F29I2SG
CPU Cores 2 × ARM® Cortex™-A9
CPU Frequency @ MHz 1,000 1,200
HPS Cores & Peripherals 2 × CAN
HPS Ethernet | USB 1 Gbps | USB 20
HPS SDRAM Size (MByte) 2,048 + ECC 4,096 + ECC
HPS SDRAM Type | Bandwidth (MByte/s) DDR4 | 7,464 DDR4 | 8,532 DDR4 | 9,600 DDR4 | 8,532
FPGA System Logic Elements 354,000 629,000
FPGA Block RAM (kbit) 15,000 28,760
FPGA DSP Systolic FIR (MMAC/s) 1,228 1,524 2,025 2,895
FPGA MGT Transceivers @ Gbps*6 16 @ 103125 16 @ 125
FPGA Peripherals 2 × PCIe Gen3 ×8
FPGA Ethernet | USB*5 Cypress FX3™ USB 30
FPGA SDRAM Size (MByte) 2,048 + ECC 4,096 + ECC
FPGA SDRAM Type | Bandwidth (MByte/s) DDR4 | 7,464 DDR4 | 8,532 DDR4 | 9,600 DDR4 | 8,532
Flash Memory 64M QSPI | 16G eMMC
Connector Pins | IO Pins 504 | 286
FPGA 3.3V | FPGA 1.8V Pins | HPS Pins - | 212 | 18
Module Dimensions (mm) 74 × 54
Temperature Range*2 0+85°C -40+85°C 0+85°C -40+85°C
Boot Modes QSPI | SD Card | eMMC | USB3
Product Status Sampling
Estimated Product Lifetime*3 2030+
Preferred Configuration | MOQ*4 Yes No | 40 No | 30 Yes
ME-AA1-270- ME-AA1-270- ME-AA1-480- ME-AA1-480-
Module Order Code
3E4-D11E 2I2-D11E 1E2-D12E 2I3-D12E
Budgetary Price 1+ (EUR) 492 596 885 974
Budgetary Price 30+ (EUR) 453 548 823 903
Budgetary Price 100+ (EUR) 415 503 766 838
Budgetary Price 1000+ (EUR) 346 423 667 729
Budgetary Price 10000+ (EUR) 266 327 518 634
* Notes:
1 We are actively looking for customers interested in this or a similar module Please contact us with your detailed requirements
2 The module is also available in different speed and temperature grades Visit the product web page for more information
3 Please contact us about production data backup and module production licence options
4 For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock - please get in touch for more
details
5 Our FPGA Manager IP Solution offers simple data streaming to/from Windows/Linux/Embedded Linux hosts
6 Adequate signal integrity over the full signal path must be ensured when using MGTs at high performance rates
26Arria 10, Stratix 10 and Cyclone 10 modules
Mercury+™ IS1 Mercury+™ IC1
Stratix® 10 Cyclone® 10 GX
SX 400 SX 650 105 220
3 1 6 5
1SX040LH3 1SX065LH2 10C×105Y 10C×220
F35E3VG F35I1VG F29E6G F29I5G
4 × ARM® Cortex™-A53 -
1,000 1,500 -
2 × CAN -
1 Gbps | USB 20 OTG -
4,096 + ECC -
DDR4 | 8,532 DDR4 | 10,664 -
378,000 612,000 104,000 220,000
30,740 49,780 7,640 11,740
1,729 4,608 TBD
16 @ 125 16 @ 15 12 @ 103
PCIe Gen3 ×8 2 × PCIe Gen3 ×8 PCIe Gen2 ×4
1 Gbps 1 Gbps | Cypress FX3™ USB 30
- 1,024
- DDR3L | 3,200
128M QSPI | 16G eMMC 64M QSPI
504 | 286 504 | 270
- | 212 | 18 18 | 192 | -
74 × 54 74 × 54
0+85°C -40+85°C 0+85°C -40+85°C
QSPI | eMMC | SD Card QSPI | Passive Serial | USB3
Advance*1 Advance*1
TBD TBD
TBD TBD
ME-IS1-400- ME-IS1-650- ME-IC1-105- ME-IC1-220-
3E-D12E 1I-D12E 6E-D10 5I-D10
TBD TBD TBD TBD
TBD TBD TBD TBD
TBD TBD TBD TBD
TBD TBD TBD TBD
TBD TBD TBD TBD
General notes:
• Not all features are available simultaneously - please check the documentation for any applicable constraints
• All specifications and release dates are subject to change without notice Please verify component specifications with vendor’s datasheets
• Enclustra maintains an errata and revision history document for each product Please also check the errata of the FPGA device and other
components
• All prices are non-binding estimates – please contact us for definitive pricing and lead-time information
• Pricing during sampling starts significantly higher and decreases with time Budgetary pricing typically starts 12 months after production FPGAs
are available
• All trademarks are the property of their respective owners All prices do not include shipping, taxes and duties
27 Mercury module connectors
Low-jitter clock generator
PCIe® ×4 interface
USB 30 device
Up to 4 × USB 20
2 × Gigabit Ethernet
Up to 2 FMC LPC/HPC connectors
mPCIe/mSATA card holder
microSD card holder
12 V single supply
160 × 1112 mm (PCB only)
Standalone or PCIe operation
Available in three configurations
(PE1-200/300/400)
Pricing
MERCURY+ PE1 ME-PE1-200-W
1+ €354
PCIe Base Board 100+
1000+
€309
€257
10000+ €216
Micro Power DC Input
Pin Headers
USB Control Connector
Mercury PE1-400
System Current
microSD eMMC JTAG Monitor Sense
Card Flash Connector
Battery Buttons &
Holder Holder LEDs
Module Connector C
FMC LPC
USB 3.0 System Connector
Device Controller
FMC LPC
Module Connector A
Module Connector B
Connector
USB 2.0 USB Clock
Host Hub Generator Pin Headers
mSATA/
Dual SMA MGT SIM Card
mPCIe
Gigabit + Clocks Holder
Card
Ethernet (optional) (optional)
Holder
28 Mars module connector
FTDI USB 20 High-Speed device
2 × Mini Camera Link
HDMI 13 connector
Micro USB 20 device
microSD card slot
42 user I/O pins
40-pin Anios headers
2 user buttons, 1 user LED
12 V single supply
120 × 80 mm
Pricing
MA-EB1-C
MARS EB1 1+
100+
€238
€212
Mars Base Board 1000+
10000+
€179
€152
USB 2.0 A
DC Input HDMI Mini Camera Mini Camera Gigabit Ethernet Micro USB
Connector
Connectors Connector Link Connector Link Connector Connector (Host)
Power
Control
Buttons &
LEDs
System
Controller Micro USB
System
Monitor
microSD
200-pin Mars Module SO-DIMM Connector Card Holder
Mars EB1 Anios™ I/O Pmod™ I/O
JTAG Connector
Pin Header Pin Headers
29 Mars module connector
FMC LPC connector
Mini HDMI connector
USB 30 device
USB 20 UART
Gigabit Ethernet
microSD card slot
12 V single supply
p-ITX format (100 × 72 mm)
Pricing
MARS PM3 MA-PM3-C
1+ €233
Mars Base Board 100+
1000+
€205
€151
10000+ €129
USB 3.0 B USB 2.0 Micro-B
Connector (Host)
HDMI Connector
Buttons & LEDs
FX3 Connector
Connector (Device) Connector (Device)
(LVDS / PCIe)
Connector
RJ45 GigE
USB 2.0 A
USB 3.0 USB 2.0
160-pin FMC LPC
Cypress FX3 USB 3.0 USB 2.0 Connector
JTAG, Device Controller UART Controller
GPIO
16/32-bit UART USB MDI 4+1
pairs
FPGA JTAG Connector
36 pairs
200-pin Mars Module SO-DIMM Connector
JTAG System Extension
Power Supply
Monitor 24 I/Os Connector
User Fan Power
EEPROM Mars PM3 Connector Connectors
30FMC DR2
Drive Control Card
FMC LPC connector
6 MOSFET half-bridges
42 V 18 A power capability
CAN
30 V sensor input and actor outputs
An ideal platform to evaluate our
Universal Drive Controller
Pricing €761
SPI Current Sense
A/D Converters FMC DR2
Amplifiers
PWM Motor Connectors
MOSFET Drivers Half Bridges 1-6
1-3
FMC LPC Connector
I2C Temperature
Brake Chopper Supply Connector
Sensors
LVCMOS Enc/Hall Encoder
Encoder / Hall Sensor Signal Conditioning
Connectors 1-3
LVCMOS 30V 30 V I/O
30 V I/O Signal Conditioning
Connectors
LVCMOS CAN
CAN Transceiver CAN Connector
31A huge logo, for a tool that saves a huge amount of time.
Our Linux Build Environment is a free tool which users can use to build their
own Linux for Enclustra modules – at the push of a button
Select a target module and base board, let the tool do its thing, and all required
binaries, such as the FPGA bitstream and FSBL, will be downloaded It also
downloads and compiles software such as U-Boot, Linux, and the BusyBox
based root file system Find out more via our website
32
FPGA SOLUTION CenterMODULE CONFIGURATION TOOLKIT
An application.
The Module Configuration Tool (MCT) is a free application which allows
the user to configure our modules and base boards via USB, without
additional hardware No break-out boxes, no funky connectors – all you
need is a USB cable
A library.
The library used by the MCT, MctLib, is also available free of charge in
binary form; it allows users to integrate module enumeration, FPGA and
SPI flash configuration, and I2C communication functionality in their own
applications
MctLib is available for both Windows and Linux, and consists of a flexible
library with a C-style interface, allowing use of the library from almost
any programming language For C++ applications, a C++ wrapper is also
provided for ease of use
A flexible codebase.
If you’d like to integrate or customize the Module Configuration Tool to
your needs, we also offer a source code license for both the GUI and the
MctLib library Contact us for more information
FPGA SOLUTION Center 33DESIGN SUPPORT
In order to make integrating our
products to customer designs as
easy as possible, we provide a
number of design support files to
make the process as pain-free as
possible.
3D models. For all of our modules and base boards, 3D models are
available to aid in the design of compatible custom hardware and
enclosures
User manuals. Everything you always wanted to know about a module,
but were afraid to ask: an A-Z of a module’s hardware, features, and
configuration options
User schematics. How the components on our hardware talk to each
other
Reference designs. Our reference designs are lovingly created to get
your design off the ground as quickly, in both HDL and software
Master pinouts. Check the pinout of a module or base board, and
compare it with other pin-compatible modules, even future modules
that haven’t been released yet
Net length tables. High-speed design is tricky; net length tables give
you exactly what you need to best plan for signal routing and integrity
Online support. For anything that isn’t covered in the information
above, our support staff are always on hand to help, even before
purchase
34
FPGA SOLUTION Center»Our IP Solutions
We offer a range of flexible IP solutions,
covering a range of applications areas; here
are a couple of things worth knowing:
They’re royalty free. After you purchase
an IP licence, that’s it; no recurring fees, no
royalties, nada The IP can be used perpetually,
according to the licence terms
We offer different licence models. The
licence itself can also be tailored to your
requirements We offer project and site-based
licences
Evaluation is also free. You can evaluate our
IP solutions, with full functionality, before
committing to buy Just drop us a mail
35UNIVERSAL DRIVE CONTROLLER Starting from €3,600
IP Solution
High-performance FPGA/SoC motion control – without writing a line of VHDL.
A highly optimized IP solution, featuring implementations of commonly-used motor
control algorithms for position, velocity and current control, as well as all required
interfaces to the power electronics A simple and portable C programming API allows
easy access to all features from software
Drive Hardware
Universal Drive Controller IP Core
Encoder / Resolver
Interface
Interface
AXI
Device Driver 1 ENC
DC
Controller
Device Driver 2 RES
Core BLDC
Event Handler
Device Driver 3
Stepper
ADC Interface Evaluation
Quick Start Kits, including support, are available
Features and benefits Integration and ease of use
Control up to 8 motors simultaneously C programming API to access all features
Control loop update rates of up to 200kHz Full integration with Intel® tools
Fully autonomous event handling Reference designs available for all motor types
Supports BLDC, DC and stepper motors
Features field-oriented control for BLDC motors
Flexibility is key
Full support for custom circuits for current, position and velocity measurement
Specify which controls loops are autonomous and which are implemented in software
EVALUATION
A free IP evaluation licence including reference design and example application is available
Start with a spinning motor using a quick-start kit including an SoC module, base board, power
electronics and motor, available for €1490
36UNIVERSAL DRIVE CONTROLLER
Evaluation Kit
Get started with the Universal Drive Controller, right out of the box.
The Universal Drive Controller Evaluation Kit provides an out-of-the box hardware
platform with reference design to both speed your development time and enhance
your productivity
The kit contains:
Universal Drive Controller Evaluation Licence, with support for up to 2 DC or BLDC
motors
Mercury SA1 SoC module
Mercury+ PE1 base board
FMC-DR2 drive control card
Maxon BLDC motor
Reference design
2 hours of support Pricing: €1,490
37FPGA MANAGER Starting from €5,400
IP Solution
USB 3.0
C/C++
C#/.NET PCIe® Gen3 FPGA
MATLAB®
Gigabit Ethernet
One tool for all FPGA communications.
Transparently stream up to 16 data streams from FPGA to host, and vice versa, without
needing to know the underlying protocols PCIe (Gen1-3, ×1-×8), USB 20, USB 30, and
10/100/1000 Mbps Ethernet links – all with one single API Also supported are FPGA-in-
the-loop applications, and memory-mapped access
Software library FPGA IP core
Simple API with intuitive read/write functions Supports standard bus interfaces
Supports C/C++, C#/NET and MATLAB Integrates into FPGA vendor tools for simple
Supports Windows and Linux drag and drop instantiation
Also available as a software implementation
Base licence for PCs (FPGA modelling) or SoC FPGAs (co-
PCIe, USB 30, USB 20 or Gigabit Ethernet processing)
2 streams
C/C++ and C#/NET
Evaluation
Windows or Linux
Quick Start Kits, including support, are available
Host/Embedded PC FPGA
PCIe
User -or-
Application FPGA
FPGA
Manager Ethernet
Manager User Logic
C/C++ Library
C#/.NET IP Core
(DLL/SO) -or-
MATLAB®
USB 2.0 / 3.0
FPGA Manager™
38UDP/IP ETHERNET Starting from €3,600
IP Core
Simple Ethernet communication, without a CPU.
A highly configurable IP core, optmised for use in current Intel® FPGA architectures It
provides a simple to use interface to the user logic, and supports the common media
independent interfaces MII, RMII, GMII and RGMII With its 8-bit wide transmit and
receive interfaces running at 125 MHz, the IP core is able to operate at full 1 Gbit/sec
wire speed 100 Mbit/sec and 10 Mbit/sec operation is also supported
Features and benefits
Operates at full 1 GBit/sec wire speed Destination UDP port, destination IP address
Complete UDP, IPv4 and Ethernet layer and destination MAC address filtering
processing UDP checksum calculation and check
Automatic ARP reply generation Ethernet frame check
Header pass-through mode Multiple UDP ports with dedicated receive and
1 Gbit/sec, 100 Mbit/sec and 10 Mbit/sec transmit interfaces for each port
operation Optional receive data buffers
MII, RMII, GMII and RGMII media independent Raw Ethernet port for non-UDP communication
interfaces (full-duplex only)
ARP
UDP/IP Ethernet IP Core Evaluation Protocol
User Transmit Quick Start Kits, including
Engine support, are available
Header
Interface
MII
MII
User Transmit .. Tx UDP Port
Data Interface . Arbiter
RMII
RMII
UDP IP Ethernet Media
Protocol Protocol Protocol Access
Engine Engine Engine Controller
GMII
GMII
User Receive .. Rx UDP Port
Data Interface . Buffer
RGMII
RGMII
User
Configuration
Interface
Key: User clock domain Ethernet PHY clock domain
39STREAM BUFFER CONTROLLER Starting from €2,400
IP Core
Large, multi-stream FIFO handling.
A versatile IP core that implements a stream to memory mapped DMA bridge with up
to 16 independent streams The IP core allows data buffering in an external memory
device to provide virtual FIFO capability, with up to 4 GB of memory A simple C
programming API is provided, as is the option to easily integrate with FPGA Manager
Features and benefits Operation modes
Standalone solution: A CPU can be easily FIFO mode: Writes and reads are done over the
replaced by a stream configuration controller AXI4-Stream interfaces
that is provided in VHDL Write mode: Writes are done over the AXI4-
Flexible data width conversion: Conversion to/ Stream, reads are done by a CPU
from any byte-multiple width for the write and Read mode: Writes are done by a CPU, reads are
read data streams done over the AXI4-Stream interface
Highly configurable: Operation mode, ROM mode: Reads are done over the AXI4-
buffer size and buffer address can be set Stream interface (the memory must be initially
independently for each stream written by a CPU)
Vendor independent: The core is optimized for
use in current Intel® FPGA architectures Intel
QSYS IP components are also provided
FPGA/SoC DeviceEvaluation
Quick Start Kits, including support, are available
Data Sources
CPU
AXI / Avalon Interconnect
168-pin Hirose FX10 Connector Config
65 I/Os
(3.3V)
Status / IRQ Mercury CA1
Stream Buffer
Controller
Gigabit
DDR2
External 16-bit Memory Data IP Core
SDRAM Ethernet
Memory Controller PHY
50 MHz Data Sinks
Clock
8-bit
FTDI
3 LEDs USB 2.0
40
Power
2.5V SPI FlashDISPLAY CONTROLLER Starting from €1,800
IP Core
Low-resource display control, with support for different display interfaces.
The Display Controller IP Core enables the easy addition of a display to existing or
future FPGA designs, allowing the system designer to focus on the main application
instead of dealing with display control issues In addition, there is no need for an
external display controller device that would consume precious PCB space and
unnecessarily extend the project’s BOM
With its modular design and strong scalability, the Display Controller IP Core perfectly
fits the system requirements without wasting any FPGA resources These unique
features will also simplify the reuse of the Display Controller IP Core in future projects
Selecting our Display Controller IP Core for the display control needs of present or
future projects will significantly reduce time to market as well as the overall system
cost
Features and benefits
Support for parallel, LVDS, HDMI/DVI and CameraLink displays without external display controller device
Support for unlimited video pages
Built-in PWM generator for display brightness control
Optional 2D accelerator unit (draw/copy rectangles, supports transparent color)
AXI bus interface for both register bank and frame buffer memory access
FPGA/SoC Device
I2C Touch
CPU
Controller
AXI / Avalon Bus
Display
Config Hardware
LVDS /
2D HDMI /
External Memory Data Parallel
Memory Controller Display
Video Controller
Data
IP Core
41» Co nt a c t
Enclustra GmbH
Räffelstrasse 28
8045 Zürich
Switzerland
+41 43 343 39 43
info@enclustra.com
Germany USA
Klaus Schwan Kevin McCluskey
Sales Representative Germany USA Representative
+49 (0) 8095 870977 +1 978 835 3941
Germany/France Asia
Guy Eschemann 聂崇岭 | Chongling Nie
Sales and Engineering Representative Germany 中国区代表 | China Representative
+49 (0) 7851 6366305 +86 138 1116 3451
42FURTHER INFORMATION
Pricing Pricing is shown for specific module variants and quantities – for a complete list of
module variants, and volume pricing for quantities of 1+, 30+, 100+, 300+, 1000+, 3000+ and
10000+, visit www.enclustra.com
Custom configurations All hardware products can be tailored to specific applications in custom
configurations (different FPGA part numbers, different memory sizes, etc)
Custom hardware design We often work together with customers to develop a brand new,
application-specific hardware product This can be a module, base board, or entire system;
development costs and production rights are shared, leaving both parties to benefit
FAQ More information and frequently asked questions can be found at www.enclustra.com/faq
Disclaimer All prices are non-binding estimates – please contact us for definitive pricing and
lead-time information Information contained in this flyer is correct as of 13th March 2017, but is
subject to change without notice Trademarks used are property of their respective owners
Copyright © 2017 Enclustra GmbH. All rights reserved.
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