Silicon Detectors with 3-D Electrode Arrays: Fabrication and Initial Test Results
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1224 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
Silicon Detectors with 3-D Electrode Arrays:
Fabrication and Initial Test Results
Christopher Kenney, Sherwood Parker, Member, IEEE, Julie Segal, and Chris Storment
Abstract— The first three-dimensional detectors with n and p
electrodes that penetrate through the silicon substrate have been
fabricated. Some expected properties, including low depletion
voltages, wide voltage plateaus before leakage current limits are
reached, and rapid charge collection are reviewed. Fabrication
steps and initial test results for leakage currents and infrared
signal detection are covered. The authors conclude with a de-
scription of current work, including fabrication of active-edge
detectors, ones with sensitive areas that should extend to their
physical edge.
Index Terms— Active edges, semiconductor detectors, silicon
detectors, three-dimensional.
I. INTRODUCTION
S OLID-STATE semiconductor diode detectors were devel-
oped in 1949 [1] but did not become important for high-
energy physics until the development of the microelectronics Fig. 1. Three-dimensional view of part of a detector with 3-D electrodes
penetrating the substrate.
industry provided rapid advances in their technology. The
first wave of improvements was to the detectors themselves, to make strip and pixel detectors (as well as all current VLSI
with the use of diffused junctions and oxide passivation electronics), since neither ion implantation nor diffusion can
[2]–[4], photolithography [5], [7], high-resistivity silicon [6], alter the silicon more than a few microns below the surface.
and getters [7]. The first devices which provided micron-level This paper and two earlier ones [13], [14] describe the
position information became possible as a consequence of beginning of what may be the next step beyond the exist-
the industry drive to fit ever-larger numbers of ever-smaller ing planar detector technology—combining VLSI fabrication
transistors on a single chip and of charge transfer devices technology with the use of additional tools and techniques
primarily developed for optical applications [8]–[11]. The from the growing field of micromachining to make devices
development of the first custom very large scale integration with structures no longer confined to the detector surfaces.
(VLSI) readout chip [12] was the key step that made the use Deep holes can now be etched, doped, and filled using these
of silicon microstrip vertex detectors possible at colliders and techniques.
much easier in fixed target experiments. However, increasing The maximum drift and depletion distances are then set
radiation hardness and speed requirements at a number of new by the electrode spacings rather than the detector thickness.
colliders are placing difficult, if not impossible, demands on Both depletion voltages and collection times can then be kept
the best this technology can offer. small. (See Figs. 2 and 3.) Simulations of 3-D detector designs
Detectors with three-dimensional (3-D) electrodes pene- indicate the initial depletion voltages will be in the range of
trating into the substrate, such as shown in Fig. 1, should 1 to 10 V, depending on electrode diameter and pitch, and
have the capability of satisfying these stringent requirements. remain low, even with bulk radiation damage that increases the
Such devices cannot be made by the methods of standard effective doping by a factor of ten. Peak fields, located where
VLSI planar technology, which have been used up to now the depletion region borders the highly doped electrodes, are an
order of magnitude below breakdown levels and can actually
Manuscript received February 9, 1999; revised April 26, 1999 and May decrease under radiation, as a larger fraction of the voltage
24, 1999. This work was supported by the U.S. Department of Energy under appears across the increasingly highly doped bulk.
Grant DE-FG03-94ER40833 and made use of the National Nanofabrication
Users Network facilities funded by the National Science Foundation under Details of these calculations and some results are given in
Award ECS-9731294. [13] and [14]. The calculations for the 3-D arrangement use
C. Kenney and S. Parker are with the University of Hawaii, Honolulu, HI the two-dimensional (2-D) finite element program, MEDICI
96822 USA (e-mail: sher@slac.stanford.edu).
J. Segal was with the Stanford Nanofabrication Facility, Stanford Univer- [15], which also handles such aspects of charge motion as
sity, Stanford, CA USA. She is now with the Heuristic Physics Laboratories, drift, diffusion, and Ramo’s theorem effects [16], [17]. The
Inc., Milpitas, CA 95035 USA. calculations for the planar detector pulse shown in [18, Fig. 3]
C. Storment is with the Stanford Nanofabrication Facility, Stanford Uni-
versity, Stanford, CA 94305 USA. assume a zero-rise time amplifier to correspond with the
Publisher Item Identifier S 0018-9499(99)07036-7. amplifier-independent calculation in MEDICI.
0018–9499/99$10.00 1999 IEEEKENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1225
would have had a long vertical component to either face and
ionization charge a long average collection distance. Reference
[20, Fig. 6] shows square columns with a 0.5-mm pitch on the
top and the distorted columns as they emerge on the bottom
of a 3-mm-thick silicon wafer.
A final paper, by Anthony [22], showed how diodes can
be formed by diffusion from holes formed by laser drilling.
Again, only one type of electrode was made, and no actual
use as a radiation detector was mentioned. A patent by Alcorn
[23] mentioned n-doped columns from laser driven holes
surrounded by p-type boxes formed by thermomigration. No
papers were ever published showing either fabricated devices
Fig. 2. Calculated depletion voltages for a 300-m-thick parallel-plate pla- or results from beam tests or experiments.
nar diode and for a 3-D detector. The 3-D electrode arrangement, shown in [13,
Fig. 1], has repeating 50-m square cells with n+ electrodes at each corner
and midway on each edge and a p+ electrode in the center. All electrodes III. THE UNDERLYING FABRICATION TECHNOLOGY
are 10 m in diameter.
he fabrication of these 3-D detectors used the ability to bond
wafers together [24]–[26], to etch deep holes with vertical
side walls and arbitrary cross sections [27]–[31], to dope the
walls [32], and to fill them uniformly [33] from top to bottom.
Doped holes are necessary because diffusion from deposited
dopant molecules on the top or bottom surfaces cannot
produce narrow columns, and the range of implanted ions is
far too short. The use of photoresist in later steps requires the
holes be filled. The full set of steps is shown in Table I and
several corresponding schematic cross sections in Table II.
IV. FABRICATION
A. Wafer Bonding
Bonding the detector wafer to a sacrificial support wafer
prevented cracks from developing after the electrode holes
were etched and during any of the stress-inducing steps
following, such as their immersion in a 125 C H SO –H O
Fig. 3. Signals, with the same total charge, from 3-D and from planar
detectors. The calculation, described in [13] uses the geometry described in
solution. It also allowed the detector wafer to be back-thinned
Fig. 2. The pulse from the 3-D detector is assumed to come from a uniform to any desired thickness and processed without additional
track parallel to the electrodes and midway between the p+ and a corner n+ yield losses due to accidental cracking. The bonding was done
electrode. The applied voltage is 10 V and the p-type silicon bulk is assumed
to have 1012 dopant atoms/cm3 . The (arbitrary) vertical scales are adjusted by removing all particulate matter from the surfaces (micron
so both pulses have the same area. diameter particles will cause millimeter diameter unbonded
regions), oxidizing the surfaces in steam, soaking in a 90 C
H SO –H O solution followed by a dump rinse and a spin
II. EARLIER ATTEMPTS
rinse, which left the surfaces coated with Si–OH groups. The
Earlier attempts were made, in the period 1975–1982, to two wafers were then aligned and pressed together. A wave of
develop 3-D electrodes for detectors and chip-to-chip con- bonding traveled radially out from the point where pressure
nectors for computers [19] using thermomigration to fabricate was applied. Hydrogen bonds, initially formed via water
aluminum-doped p-type columns in an n-type silicon substrate. bridging, were then converted with heat to siloxane bonds:
In this process, a silicon wafer has a temperature gradient Si–OH HO–Si Si–O–Si H O as the water was driven
imposed with the entire wafer maintained above the lowest off or sequestered in the oxides. After all fabrication steps
melting point of an aluminum–silicon mixture. Aluminum, are complete, the wafer top can be protected with photoresist,
placed on the low-temperature surface, diffuses into the sil- primarily to protect the region near the edges, then placed
icon, reducing the melting point and forming a molten zone. face down in an etcher while the support wafer, now on
Aluminum then diffuses from the cooler high-concentration top, is etched off. The measurements described in this paper,
region to the warmer low-concentration region, extending the however, were done with the support wafer left in place.
molten zone there and causing freezing at the cooler end which
now has less aluminum. This process thus produces a column B. Etching Holes
of dissolved aluminum in the silicon. The holes were etched with an inductively coupled plasma
Papers by Anthony and Cline [20] and by Alcorn et al. system [27]–[31] made by Surface Technology Systems. It
[21] described arrays of deep diodes. Since electrodes of only forms fluorine ions from SF and drives them straight down
one type were mentioned and made, the field between them onto the wafer, eventually forming the gas SF in unmasked1226 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
TABLE I
CLEANING STEPS INDICATED IN THE THIRD COLUMN ARE COMPLETED BEFORE THE REST OF THE STEP. CLEANING STEPS 23 MAY
BE OMITTED IF THE STEP IMMEDIATELY FOLLOWS THE PRECEDING STEP. THE SPECIFIC CLEANING STEPS ARE AS FOLLOWS
1: 20 MIN H2 SO4 /H2 O2 (4/1)-120 C, DUMP RINSE, SPIN RINSE.
2: 10 MIN H2 SO4 /H2 O2 (4/1)-90 C, DUMP RINSE, 10 MIN HCl/H2 O2 /H2 O (1/1/5)-70 C, DUMP RINSE, SPIN RINSE, DRY.
3: 20 MIN EMT-130T-90 C; DUMP RINSE, SPIN RINSE, 5 MIN PRS-1000-40 C, DUMP RINSE, SPIN RINSE.
4: 5 MIN IN OXYGEN PLASMA.
5: 2 MIN HF/H2 O (1/20).
6: 10 MIN H2 SO4 /H2 O2 (4/1)-90 C, DUMP RINSE, SPIN RINSE.
parts of the wafer. Fluorine that does not react on the bot- (Studies now underway by other groups may further improve
tom of the hole could etch away the sides of the hole. To its performance beyond that seen with its initial settings [34].)
minimize this, after several seconds the plasma etching is Optical microscopes with through-the-lens light systems have
stopped, the SF is pumped out, and then is replaced by convergence angles that are far too large to illuminate most
C F —perfluorocyclobutane, a four-carbon single-bond ring of the sides, let alone the bottom of the holes, and a depth
molecule with two fluorines on each corner. In a plasma, single of field that is far too small. Scanning electron microscopes
bonds are easily broken to yield CF and other radicals which have an adequate depth of field but still have illumination and
form a teflon-like coating on all surfaces including the insides angle-of-view problems.
of the holes. Several seconds later, the C F is pumped out and Sawing through the etched wafer (and some of the holes)
replaced with SF . The modest accelerating voltage between provided the needed side views. Chipping along the hole edges
the plasma and wafer allows the fluorine ions to rapidly etch produced several micron irregularities which did not seriously
the coating on the bottom of the hole, while the side-wall degrade the diameter measurements. Fig. 4 shows saw cuts
protection lasts through another etching cycle. through typical holes. Fig. 5(a), using data from those and
Since the etcher was new, we first etched arrays of holes many similar views, shows the depth reached as a function of
and trenches of varying sizes, using the recommended settings. etch time for four as-drawn (lithographic) diameters. LargerKENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1227
TABLE II
FABRICATION STEPS—SCHEMATIC CROSS SECTION DIAGRAMS. THE
DIAGRAMS ARE SHOWN AFTER EACH SET OF STEPS. NEITHER THE
WAFERS NOR THE STRUCTURES ARE TO SCALE. THE SUPPORT
WAFER WAS THICKER THAN THE DETECTOR WAFER, BUT WITH NO
STRUCTURES TO SHOW IT WAS MADE SMALL TO SAVE SPACE
(a)
(b)
(c)
Fig. 5. Plots of: (a) hole depths as a function of etching time, (b) actual hole
diameters as a function of etching time, and (c) depth as a function of actual
diameter for various hole diameters on the lithographic mask.
in Fig. 5(c). Fig. 6 shows a wafer from an initial test batch,
illuminated with light coming from a ceiling light fixture
through the holes. The bright squares on the right are high-
Fig. 4. A view of part of a set of etched holes, showing the increased depth density arrays of holes for the p-electrodes of pixel detectors.
reached by holes of larger diameters. The wafer was 540 m thick and the
etch time was 5 h. The photo-mask hole diameters from top to bottom are:
(This sort of view cannot be seen with wafers produced by
four holes at 30 m, four at 25 m, and one at 20 m. current methods, since the support wafer is in place before
any holes are etched.)
diameter holes etch more rapidly, as is evident from Fig. 5(a).
There is also an increase in diameter, shown in Fig. 5(b), due C. Filling the Holes
to imperfect sidewall protection. This is the main reason the The holes were filled with polysilicon (poly) [33] so pho-
current depth-to-diameter ratio is limited to 11.5, as shown toresist could later be spun evenly over the wafer surface.1228 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
(a)
(b)
Fig. 6. Photographs showing light passing through a wafer with the p-electrodes etched completely through: (a) a whole wafer and (b) part of a single
structure. (The shadow at lower left is the tweezers holding the wafer, at lower right the edge of the ceiling light fixture.)
Also, the poly prevents the photoresist from being trapped in both signs of the charge to be collected. That lifetime has
the holes, which is important since it must be removed from the been increased by recrystallization of the poly at elevated
wafer before any high-temperature furnace steps. In addition, temperatures. This process also decreases the stress of the
if the lifetime in the poly is at least several nanoseconds long, it poly. Some of the wafers, including the one used for this
should be possible to make electrode diameters small enough paper’s results, omitted step 12 to further reduce the stress; the
that one sign of charge generated by ionizing radiation will photoresist was able to span the small central hole. (If single
diffuse out of the electrode into depleted silicon, allowing crystal silicon could be grown, a radial gradient of dopantKENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1229
Fig. 7. Scanning electron microscope view of etched poly-coated (a)
290-m-high test structures. The scale at the lower right only applies to
horizontal dimensions. Vertical ones are compressed by a factor of about 0.7.
density would produce collection fields within the electrodes.
Fabricating such electrodes has not yet been attempted.)
Poly deposited by low-pressure chemical vapor deposition
using the capture and surface decomposition of silane makes
a conformal coat since: 1) the silane mean free path is
large compared with the dimensions of the hole and 2) the
probability of attachment on any one collision is kept small
by choice of the gas temperature. The most likely fate of any
silane molecule entering a hole is to bounce a number of times
and leave. When it does interact, it is almost as likely to be
at the bottom as the top.
Fig. 7 shows a saw cut through test structures where cylin-
drical pillars are centered in 290- m deep holes and connected
(b)
to the wall by thin webs. Fig. 8, an enlarged view of the 12- m
diameter column on the right in Fig. 7 shows both the vertical
nature of the etching and the conformal nature of the poly
deposition. Fig. 8(a) shows the top, after deposition of a 2- m
thick coat of poly. Other than a 0.4- m lip at the top, it is
the same diameter as the bottom, shown in Fig. 8(b), 290 m
down. The diameter halfway down (not shown) is 1.2 m less,
due, we believe, to thinning of the original etched column.
Fig. 8(c) shows the bottom of a similar column without the
poly. The poly not only makes a highly conformal coating,
but also a smoother one. Normally, poly and single crystal
silicon cannot be visually distinguished on a saw-cut surface,
and so sawing through an array of filled holes cannot show
that holes were even there. However, in the photomicrograph
of Fig. 9, a clear distinction can be seen in the cracked face
of a wafer from the initial batch, before wafer bonding was
used, as the crack propagates along the grain boundaries. (c)
Fig. 8. High-magnification views of: (a) top, (b) bottom of the right column
D. Doping of Fig. 7, and (c) a similar column without the poly coating.
There are several ways to dope and fill the holes.
1) They could be doped first and then filled using low- rapidly through polysilicon, the rate depends on the exact
pressure chemical vapor deposition. conditions of the poly deposition. With no oxide layer
2) They could be partially filled with poly, doped with at the single crystal surface, a signal charge might be
the subsequent removal of any oxide, annealed to drive collected from some or all of the poly electrode.
in the dopant, and filled with more poly. Although We used phosphorus, rather than arsenic, for doping the n
there is evidence in the literature that dopants diffuse electrodes, since phosphorus also acts as a getter. (As does1230 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
Fig. 9. Cross section of an electrode which has had 0.6 microns of poly deposited on its inner surface, had this surface heavily doped with boron, and then
had the remaining hole filled with poly via low pressure chemical vapor deposition. The poly coat is visible on both the top and bottom surfaces as well
as throughout the electrode. It was thicker (17 m) than planned (12 m) due to a defect in the deposition tube flowmeter. Some of the variation in the
23-m-diameter electrode’s profile is caused by the breakage plane not being parallel to the electrode’s vertical axis.
boron.) The gases available at Stanford, P O and B O , are surface were determined by surface resistivity profile analysis.1
produced by bubbling gas through liquid sources using the Fig. 10 shows these concentrations. The poly layer is easily
reactions recognized by its near constant dopant concentration, due
to the rapid rate of diffusion in poly compared to that in
POCl O P O Cl single-crystal silicon. Fig. 10(a) and (b), in which the dopants
and were deposited first, demonstrates that the poly growth is not
affected by the presence of an underlying glass, heavily doped
BBr O B O Br
with either boron or phosphorus. Rapid diffusion of both boron
and phosphorus through poly and into the single-crystal bulk
The dopants P and B then come from the reactions using our operating conditions has been confirmed by the
results shown in Fig. 10(c) and (d).
P O Si P SiO Given the results of Fig. 10(c) and (d), method (2) was used.
and Several microns of poly were deposited, the holes were doped
B O Si B SiO with phosphorus, followed by a drive-in, and the holes were
then filled with more poly. A similar set of steps with boron
produced the p electrodes.
at about 950 C.
A series of test wafers was fabricated and sent to Solecon 1 Solecon Labs, Inc., 2241 Paragon Drive, San Jose, CA
Laboratory where the dopant concentrations on the wafer (www.solecon.com).KENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1231
(a) (b)
(c) (d)
Fig. 10. Surface resistivity profiles showing the net dopant concentration versus depth for high-resistivity wafers which have: (a) boron doping, then 1.2
microns of poly deposited, (b) phosphorus doping, then 1.2 microns of poly deposited, (c) 1.2 microns of poly deposited, then doping with boron, and (d) 1.2
microns of poly deposited, then doping with phosphorus. As a final step all wafers were given a thin capping oxide and annealed for 3 h at 1000 C.
Two items, planned for the next fabrication run, were
omitted in this initial one so the first devices could be produced
rapidly and with minimal complications: 1) a field implant
or a gate on the field oxide, to prevent the electron sheets,
induced by the positive charge at the oxide-silicon interface,
from increasing the n to p electrode capacity and 2) active
edges, which will be described briefly in the next section. Field
(a)
implants, while desirable, are not required here, since all our
detectors alternate n with p electrodes, and the resultant field
lines parallel to the surface pull the electron sheet away from
the p electrodes. This was covered in [13, Sec. 7 and Fig. 10].
V. ACTIVE EDGES
Detectors made using planar technology have an insensitive
region around their edges due to a combination of three reasons
as indicated in Fig. 11(a). (b)
1) The depletion region and its electric field, which bulges Fig. 11. (a) Schematic cross-section view of a detector edge, showing some
reasons for the insensitive region there: a) space may be needed for guard
out from the last electrodes toward the nonpassivated and voltage-dropping rings, b) the saw-cut edges are conducting, and c) often
saw cuts at the detector edges, must not reach them, and contain chips or micro-cracks, all of which must remain clear of d), the bulge
so require a safety margin. of the edge of the electric field in the depleted region. (b) Cross section
showing two overlapping detectors, a support structure between them, and
2) Chips in the edges further intrude into this margin. a track slanted in the direction that requires increased overlap beyond that
3) Space must be allowed for guard rings. shown in Fig. 11(a) for full efficiency.1232 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
For example, pixel sensors for the ATLAS detector at the same number of p-type electrodes with the same pitch.
Large Hadron Collider at CERN are planned to have an active These geometries should reduce the voltage required to
region that is only 80–85% of the total area. If an experiment fully deplete the detectors after bulk radiation damage
requires multiple overlapping detectors to fully cover an area, by factors of about 8 and 15.
the overlap may need to be further increased to allow for 3) Centimeter-long strip detectors using the same geometry
slanted tracks as shown in Fig. 11(b). as an ATLAS sensor, but with the individual 3-D pixel
However, trenches can be etched and doped, just as holes cells tied together to form strips which can be read out
can. Forming the detector edges with doped trenches could via standard silicon strip readout electronics.
be used to produce detectors with no dead regions near their 4) A small pixel array, using the ATLAS sensor geome-
edges. Fig. 12(a) shows a set of trenches etched in a 525- m- try, which has each cell connected to a bonding pad,
thick wafer, which was then sawed through at right angles to allowing the detector to be tested using aluminum-wire
the trenches to show their cross section. Such trenches could bonding to standard front-end electronics.
terminate the horizontal electric field lines from the last rows 5) Detectors in which the drift time within a cell is mea-
of 3-D electrodes. The doping step could be followed by metal sured.
deposition with the metal continuing onto the top surface of 6) Sets of parallel trenches and concentric cylinders to mea-
the detector (possibly in contact with the heavily doped single sure capacitance and current versus voltage, providing
crystal silicon below it). The edge potential, as well as that information on the leakage currents, depletion voltages,
of all the n and p electrodes, would then be set entirely by device capacitances, and the effects of radiation damage.
top-side contacts. 7) Detectors with all electrodes of each polarity tied to-
Fig. 12(b) shows a schematic view of the corners of two gether, providing similar information for specific detec-
active edge detectors still on their supporting wafer. In addition tor types.
to the reasons given in Section IV, the support wafer is needed 8) Structures to determine the conductivity of the elec-
after the trenches are etched to keep any fully diced parts trodes, the resistivity of the aluminum and diffusion
in place during the final fabrication steps. Near or complete layers, and of the contacts between them.
filling of the trenches is required to permit the smooth passage
of spun-on photoresist in the final masking steps. These may
include metal patterning and a final precision dicing etch in VII. INITIAL MEASUREMENTS
place of sawing. Etching away the support wafer would then Initial current–voltage and infrared signal measurements
be the final step. were performed with the devices on the wafer, prior to dicing.
It is not required that the chip be a rectangle if some other Since the depleted area could extend well beyond the array in
form, for instance a hexagon, made more efficient use of the the undiced wafer, the outer three columns and rows (in order,
wafer area. It would also not be required that its edges even p, n, and p) were connected with aluminum traces on the top,
be straight lines, if some other shape would produce better to form “guard fences” even though classical guard rings were
electric field properties. Of course, most of the time, active not necessary inside any saw cuts, since corresponding points
edges would be used to tile a large region with smaller edge- of the top and bottom were at the same voltage. The following
butted detectors, and the nonstraight edges would have to results are then given for the well-defined area of the array
match each other. At the expense of additional steps, both n inside them.
and p edges could be made. An oxidized edge is also possible, The measurements used arrays hooked up in alternating
for example, between n and p edges, or by itself, though in columns of n and p electrodes, with the n electrode locations
that case it would charge up to values set by leakage currents shifted half a spacing along the column length relative to
and might not provide precise control of the edge fields. those of the neighboring p electrodes. Fig. 13 shows one with
Etched trenches rather than saw cuts might be used with a 200- m n-to-n column pitch, with the p columns midway
planar detectors if the freedom from chips and greater accuracy between. A second commonly used pitch was 100 m. The
in placement relative to other structures were important enough effective electrode diameter was slightly larger than the 17- m
to justify the extra work. diameter of the etched holes due to dopant diffusion into the
single-crystal silicon. The p-bulk was 121- m thick and had
a dopant concentration of 1.2 10 /cm .
VI. FABRICATED DEVICES
Fig. 14 shows current–voltage curves for the first 3-D
The mask set contains designs for 34 variations of 3-D devices fabricated. Figs. 15 and 16 show the same curves for
detectors and six sets of test structures. They include the the 100- and 200- m devices with the vertical scales expanded
following. by factors of 2000 and 400. A small spike can be seen in each
1) Strip and pixel detectors with varying pitch, electrode di- case before the electrodes are isolated from the surrounding
ameter, guard arrangement, and electrode pattern. Some silicon as it is depleted. With depletion, the leakage current
pixel detectors have individual cells that can be read out drops to the sub-nA range. Four 3.7 mm detectors had room
via wire-bond pads. temperature leakage currents between 0.24 and 0.69 nA/mm .
2) Pixel detectors with bump-bond pads that fit the standard Three 1.2 mm ones had currents between 0.65–1.27 nA/mm .
ATLAS cell dimensions, with 2 or 3 n-type electrodes Tests to measure the relative contributions from surface and
per cell with spacings of 100 or 67 microns and the bulk sources remain to be done.KENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1233
(a)
(b)
Fig. 12. (a) Photograph of the cross section of a 525-m-thick wafer with etched trenches. Damage from the diamond saw wheel, schematically indicated
in Fig. 11(a), can be seen at the top along the bottom and (b) view of part of two adjacent active edge detectors before metal deposition and still bonded,
with an oxide layer, to their support wafer (not to scale). The visible parts of the doped polysilicon electrodes are shaded. The cut face (dashed lines)
shows a schematic view of the interior.1234 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999 Fig. 13. Metal layer layout for a detector with columns of n electrodes alternating with columns of p electrodes. The p electrodes are shifted 68 m in the column direction (one half the electrode spacing in that direction). With the exception of several isolated electrodes, all n and all p array electrodes are connected, so two leads from a power supply will energize the entire array. Three bands of guard fences (respectively, p-type, n-type, and p-type) surround the array. In future devices, these may be replaced with an active edge just outside of the detector array. Fig. 14. Current–voltage curves for detectors such as shown in Fig. 13. The two p guard fences are connected, while the middle n guard is floating. Current to the guard electrodes is not included. The leakage current at 10 V, where Fig. 15. Leakage current for the 200-m pitch detector, as in Fig. 14, with the detector is fully depleted, is 0.25 nA/mm3 . the current scale expanded by a factor of 400. Charge collection was tested with a pulsed 915-nm infrared ones of that type) are grounded, while a reverse voltage is light emitting diode (Archer 276-142) placed at the eyepiece applied to the ganged ones of the opposite type. Fig. 17 shows of a microscope set at a magnification of 200. This produced, the pulse height from the p electrodes as the reverse bias across below the objective lens, a column of ionization with about the detector is increased. A rapid rise to full charge collection 580 m full-width at half-maximum and a 1/e absorption is seen at 5 (8) V for the 100 (200)- m pitch arrays. The length of 34 m. For these measurements, a 12C Picoprobe2 injected charge and pulse timing were arbitrary, set only to contacts one of the isolated electrodes shown in Fig. 13. The be large compared with noise, and small compared with any ganged electrodes of the same sign (almost all the remaining saturation voltage. 2 12C Picoprobe (having an input impedance of 0.1 pF in parallel with The signal from the n electrodes is more than an order of 1 Megohm), GGB Industries, Naples, FL 34104 USA. magnitude smaller up to about 54 V and then rapidly increases
KENNEY et al.: SILICON DETECTORS WITH ELECTRODE ARRAYS 1235
Fig. 16. Leakage current for the 100-m pitch detector, as in Fig. 14, with
the current scale expanded by a factor of 2000.
Fig. 18. Pulse heights from isolated p and n electrodes under conditions
similar to those of Fig. 17. The rapid rise in the signal from the n electrode is
due to its isolation as the surface electron sheet is pulled back by the applied
voltage. The n-to-n electrode pitch is 200 m.
Fig. 17. Pulse height from an isolated p electrode as the reverse bias across
the detector is increased. The region around the electrode is illuminated by
a beam from a 915-nm infrared light emitting diode which is reduced to a Fig. 19. Resistance between an individual electrode and the like-sign ganged
diameter of about 580 m full-width at half-maximum by placing the diode at electrodes as a function of the voltage between them and the opposite-sign
the eyepiece of a microscope. Differences in focus and relative spot placement electrodes for the 100-m pitch detector. The increase in resistance to
can cause the small differences in pulse heights between the two detectors. 1 megohm (the input resistance of the 12C Picoprobe) occurs when the
individual electrode is isolated from the others, for the p electrode, at the
bulk depletion voltage, and for the n electrode, when the surface electron
to its full value, as can be seen in Fig. 18. This is due to the sheet is pulled back.
electron sheet at the surface mentioned in Section VII. The
Picoprobe has an input resistance of 1 megohm, while the while that of the n electrodes rises just where its signal does
resistance of a single n electrode to the rest of the n electrodes also, at the voltage at which the induced surface charge is
through the sheet is of the order of 50 K at voltages just pulled back, and the individual n electrodes are isolated.
above full depletion for the bulk silicon, so most of the signal
current goes to the other electrodes, even if it was initially VIII. CONCLUSIONS
collected by just one of them.
This can be seen directly from Fig. 19, in which the The first 3-D detectors have been fabricated. The initial on-
resistance is measured between an individual electrode and wafer – and infrared beam tests have been completed with
the like-sign ganged electrodes as a function of the voltage satisfactory results. Additional testing is next planned with
between them and the opposite-sign electrodes for the 100- m arrays in which columns of 3-D electrodes are connected to
pitch detector. For this measurement, the like-sign ganged silicon strip detector readout electronics. Tests are also planned
electrodes are grounded as is the Picoprobe output. Since that to measure the capacitance of the electrodes.
has an input resistance of 1 megohm, the resistance through
it to ground (and then to the other like-sign electrodes) is the ACKNOWLEDGMENT
upper limit of the resistance. It can be seen that the p electrode The authors would like to thank J. McVittie, who provided
resistance goes to 1 megohm by 5 V, its depletion voltage, valuable information and advice throughout this project, A.1236 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 46, NO. 4, AUGUST 1999
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