Spectral Spurs due to Quantization in Nyquist ADCs
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1422 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Spectral Spurs due to Quantization in Nyquist ADCs
Hui Pan and Asad A. Abidi, Fellow, IEEE
Abstract—This paper presents intuitive yet quantitative insights of practical integrated ADCs. In this paper, we couple analysis
into the harmonics of analog-to-digital converter (ADC) output with simulation of ADC spectra on MATLAB, which leads to
spectra. It derives the spectral signatures associated with imper- ready visualization of the spectral signatures associated with
fections in practical ADCs. This understanding leads to remedies
based on architecture and time-averaging, which are combined to quantization imperfections. Then aided by an understanding of
propose a calibration-free pipeline CMOS ADC that simulations the underlying physical phenomena, we seek practical solutions.
show is capable of better than 100-dB spurious-free dynamic range In this spirit, we offer an intuitive yet quantitative under-
in the presence of real-life imperfections. standing of an ADC’s spectral properties. The focus is on how
Index Terms—Analog-to-digital converter, dither, dynamic imperfections in the two most widely used Nyquist ADCs today,
element matching (DEM), IF sampling/demodulation, spectra of the flash and pipeline [20], [21], create spurs in their output
quantization, spurious-free dynamic range (SFDR).
spectra. To begin with, Section II analyzes the spectra of ide-
ally quantized sinewaves and considers the signal dependence
I. INTRODUCTION of the spectra. Sinewave inputs to the ADCs are given special
attention, not only because they are the basis of all periodic sig-
I N BROAD-BAND communication systems such as wireless
base stations, an analog-to-digital converter (ADC) digitizes
tens of channels of strong and weak signals simultaneously. A
nals, but because full-scale (FS) sinewaves are used in the def-
inition of SFDR, a critical specification for radio receiver ap-
plications [3]. Section III sorts out various imperfections in the
digital signal processor (DSP) subsequently separates and de-
Nyquist ADCs and discusses the corresponding spectral signa-
tects each channel [1]–[4]. Because of the DSP processing gain,
tures. Based on the new insights, the existing ways to lower
wide-band noise presented to the detector is usually less trouble-
spurs are systematically examined in Section IV. At the end,
some than the spurious tones (spurs) that arise at unexpected fre-
we propose in Section V an uncalibrated pipeline CMOS ADC
quencies from quantization of in-band signals. Since the max-
that makes the best use of these techniques. Simulations show
imum spur may fall in any channel in the Nyquist band, it is usu-
this ADC, with the unit capacitors matched to 12 bits, is ca-
ally the spurious-free dynamic range (SFDR), not the signal-to-
pable of 100-dB SFDR. To put this into context, the current
noise ratio (SNR), that limits receiver sensitivity. Therefore, the
state-of-the-art [22]–[30] is an SFDR of about 80 dB without
SFDR of the ADC should be large, say, beyond 80 dB, so that the
calibration. Section VI summarizes our findings.
spurs do not block the weak legitimate channels; and the ADC
So as not to be distracted by circuit imperfections, we limit
must also operate at a sufficiently high rate, say, up to 100 MHz,
our scope to well-behaved ADCs that do not suffer missing
to convert the wide-band input without aliasing.
codes at the output.
ADC dynamic range including the SFDR can be improved by
either processing oversampled data or by calibrating the ADC
[5]–[9]. However, this is at a price: at wide input bandwidths,
the ADC is limited to oversampling by small factors, and cali- II. SPECTRA OF QUANTIZED SINEWAVES
bration raises complexity. It is more efficient to spread the quan-
tization error uniformly over the Nyquist band. This requires a ADCs usually consist of a sampler before the quantizer, as
good understanding of the spectral properties of Nyquist ADCs. shown in Fig. 1(a). For the purposes of analysis, the actions are
There is some prior literature on this subject; however, none commutative, that is, it does not matter if the ADC quantizes
of it satisfactorily addresses the problem posed above. Most pre- a signal before sampling [17], as shown in Fig. 1(b). With the
vious studies deal with the statistical and asymptotic aspects order reversed, we need only focus on the quantization of con-
of the quantization errors [10]–[14], without much attention to tinuous input signals and then impose the well-known aliasing
the spectra of quantized periodic signals. The few exceptions effects. Therefore, we will use the terms “ADC” and “quantizer”
[15]–[19] involve intensive mathematics, at times even inge- interchangeably.
nious technique, but are of little value to the circuit designer We start by describing the output spectrum of an ideal quan-
tizer that is digitizing a FS sinewave. This is a sinewave whose
Manuscript received October 15, 2003; revised February 12, 2004. This paper peaks reach the extreme thresholds of the ADC. An -bit quan-
was recommended by Associate Editor A. M. Soliman. tizer is called ideal in this paper when its output levels
H. Pan was with the Integrated Circuits and Systems Laboratory (ICSL), , , are centered between adjacent quantization
Electrical Engineering Department, University of California, Los Angeles, CA
90095-1594 USA. He is now with Broadcom Corporation, Irvine, CA 92619- thresholds and , which themselves are uniformly dis-
7013 USA (e-mail: hpan@broadcom.com). tributed over the input FS, with equal step size
A. A. Abidi is with the Integrated Circuits & Systems Laboratory (ICSL), . The difference between the quantizer input–output char-
Electrical Engineering Department, University of California, Los Angeles, CA
90095-1594 USA. acteristic (Fig. 1) and the straight line defines
Digital Object Identifier 10.1109/TCSI.2004.832755 the quantization error . For an ideal quantization staircase
1057-7122/04$20.00 © 2004 IEEEPAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1423
Fig. 1. ADC modeled as (a) a sampler preceding a quantizer or (b) a sampler
following a quantizer [17].
function, the error is a sawtooth. The error in is expressed in
units of the least significant bit as integral non-
linearity (INL). In this paper, we assume is on the order of
one LSB.
Before going into details of the spectral content, let us first
summarize the asymptotic properties of quantization error.
A. Asymptotic Properties of Quantization
An -bit ideal quantizer divides the signal FS into uniform
bins. Over time, a signal spanning the FS lands in each bin with
some probability density function (PDF). Accruing the PDFs
over the identical bins into a distribution over a single
bin, [ , ], yields the PDF of the quantization Fig. 2. A 5-bit quantizer (n = 5) digitizing a FS sinewave, simulated in
error [13]. As long as the signal PDF is continuous over a MATLAB. (a) Sawtooth input–output error characteristic. (b) Error waveform.
(c) Output spectrum.
given FS—which is almost always true for real-life signals—the
individual and aggregate PDFs both approach uniform distri-
bution as the resolution goes to infinity (see [12, p. 21] for of the quantized output or analytically by a Fourier series ex-
a derivation). The uniform distribution of over [ , pansion, which leads to the spur amplitude expressed in terms
] results in the well-known mean-square quantization of Chebyshev polynomials or Bessel functions [17]–[19]. The
error, , asymptotically independent of the signal. For error waveform in Fig. 2(b) can be divided into three portions:
an FS sinusoid, the signal power is given by , where sawtooth, bell, and transition. The sawtooth portion arises from
. Divided by the quantization error power, quantization around the zero crossing, where the sinewave is
this leads to an expression for the signal-to-noise-and-distortion ramp-like. More precisely, this is the region where the input
ratio (SNDR)1 given as follows: sinewave stays within of the
linear ramp , that is,
dB (1)
Equation (1) is usually derived assuming that the “quanti-
zation noise” uniformly distributes over [ , ]
[10], [11]. However, this assumption is true under certain sta-
tistical conditions [13] or asymptotically for very large . A
periodic signal passing through the quantization staircase actu- The period of thisapproximate sawtooth is
ally suffers deterministic distortion, which appears in the output , where
spectrum as harmonics, not random noise. We will discuss this is the period of the input sinewave. An ideal sawtooth
next. waveform of this period corresponds to a series of harmonics
in the spectrum with the fundamental located at .
B. Error Waveform and Spectrum
The sawtooth portion of the error repeats every cycle of
Fig. 2 shows the quantization error as a function of input the sinewave, resulting in spectral energy at the sawtooth
and time and the corresponding spur spectrum for a 5-bit ideal fundamental and its harmonics, surrounded by skirts of lower
quantizer digitizing an FS sinusoid. The spectrum is obtained tones spaced by . As is shown in Fig. 2(c), the sawtooth
numerically by the (long-length) fast Fourier transform (FFT) fundamental constitutes the highest spur whose harmonic index
1This is referred to as SNR in the literature where quantization errors have is given by
been overwhelmingly treated as noise, but we think SNDR is a better term, es-
pecially in this paper which deals with quantization spurs. (2)1424 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
2 . Also, there are now twice as many harmonics that fill the
gap between the fundamental and the largest harmonic. With
half of the error distributed across twice as many harmonics,
the height of each harmonic must go down, and therefore the
SFDR rises by 9 dB. On the other hand, when the input ampli-
tude halves, the asymptotic error power remains unchanged, but
the periodicity of the error waveform goes down 2 because
the input sinusoid traverses half of the quantization thresholds.
There are now half as many significant harmonics sharing the
same amount of power as before. The spurs must rise by 3 dB,
and the SFDR worsens by 3 dB FS (or 9 dBc). This trend is
the opposite to what happens in continuous-time nonlinear sys-
tems, where we are accustomed to improvements in linearity
with smaller inputs. This shows why quantizer SFDR must be
specified as a function of the input magnitude.
D. Spectrum Aliasing
Fig. 3. SFDR and SNDR versus resolution n for ideal quantizers digitizing an Sampling the quantized signal aliases high-order spurs into
FS sinusoid, simulated in MATLAB. the Nyquist band [0, ), where is the sample rate. If the
sample rate is an integer multiple of the input frequency, aliased
spurs will coincide in frequency with unaliased low-order spurs
Quantization at the peaks of a sinewave produces errors in the
and add to them as phasors, worsening the SFDR. This can
form of bell-like pulses. The pulses are periodic at the sinewave
confuse the interpretation of our numerical experiments, which
frequency and therefore contribute low-order harmonics. Since
is why we use a very large number of points in numerical
the error pulses are small and narrow compared to the period, the
FFTs—up to 16 —and place the input sinusoid in the
corresponding harmonics are low and flat in the spectrum, re-
lowest FFT frequency bin. In ADC testing, the input frequency
sembling the spectrum of a train of impulses. It has been shown
is usually chosen to lie in a prime numbered bin and the number
that, as increases, these harmonics at low indexes approach a
of FFT points is set to some power of two. In real applications,
level of (dB) relative to the fundamental of the quan-
careful frequency planning makes it unlikely that harmonics
tized sinewave at 0 dBc [17], [19]. Finally, the transition region
will clump together.
in the error curve between the sawtooth and the bell induces a
wide band of harmonics that fill in the frequencies between the E. Signal Dependence
low-index harmonics and the high-index peaks. Fig. 2(c) shows
Equations (2) and (3) would not be very useful if they pre-
the signature spurs corresponding to the three portions of quan-
dict a peak spur which is sensitive to small perturbations in the
tization error.
phase, offset, or amplitude of the input sinusoid. Let us examine
these one by one. Phase shift in the sinusoid has no effect on the
C. SFDR and Energy Conservation
spur spectrum, except to induce an identical phase shift in the
Single-tone SFDR is usually defined as the difference in output. On the other hand, as the input amplitude falls below
decibels (dBc) between the fundamental and the largest spur FS, the bell portion of the error waveform shrinks in width and
of a quantized sinewave. By default, we assume that the input magnitude, creating smaller harmonics at low indices [19], [33].
sinewave covers the ADC FS and the SFDR is simply specified If the input is offset from a zero baseline, it breaks the odd sym-
in decibels. Fig. 3 plots the numerically simulated SFDR of metry in the quantization error, causing even harmonics to ap-
ideal quantizers digitizing an FS sinusoid with a resolution of pear. Although the average spur level goes down by up to 3 dB
bits. For below 4, the SFDR follows a (dB) asymptote, because now there are roughly as many even harmonics as there
where low-index harmonics dominate; for , it retreats to are odd, the maximum spur, which arises from the sawtooth por-
an asymptote of ( ) dB, where the high-index spurs tion of the error waveform, remains almost unchanged.
dominate. On this basis, we postulate an expression [18] for Quantization of nonsinusoidal inputs may create markedly
SFDR as follows: different patterns of spurs. It is impossible to analyze all possible
signals, but we should be able to construct some worst-case sig-
SFDR dB (3) nals for which the ADC output error energy, which is asymptot-
ically for ideal quantization, collapses onto just a few
where , an empirical quantity, ranges from 0 to over the dominant spurs that, for reasons of energy conservation, should
span . be of the order (dB FS).
The term in (3) can be justified using energy conservation One such case is a periodic sawtooth input, whose quantiza-
[19]. As ADC resolution increases by one bit, the amplitude tion error waveform is also a sawtooth. The spurs consist only of
of drops by 2 or 6 dB, as (1) also indicates. However, the harmonics of the sawtooth error waveform. A second case
the sawtooth periodicity of doubles, which means that, ac- is that of a small input sinewave whose amplitude is lower than
cording to (2), the index of the largest harmonic is pushed out one LSB. Now the quantizer degenerates into a one-bit slicer,PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1425
Fig. 4. Block diagram of multistage pipeline ADCs. (a) Two-stage pipeline. (b) 1.5-b/stage pipeline.
whose entire error waveform is a square wave toggling between III. IMPERFECTIONS IN ADC ELEMENTS
and .
Two equal tones closely spaced in frequency create a
sinewave fully modulated in amplitude at the beat frequency. Flash-like one-step ADCs are commonly used at low reso-
As the sawtooth portion of the error waveform shrinks with the lution (e.g., 8 bit or below) to realize high throughput rates,
modulated amplitude, the bell-like portion expands. As a result, whereas pipelined or multistep ADCs are more appropriate at
error energy moves from high-index to low-index spurs and high resolutions. The two ADC architectures are actually re-
simulations show that the SFDR in dB FS is not much affected. lated. Fig. 4(a) shows the block diagram of a pipelined two-step
Generally, the signal that consists of ( ) tones evenly ADC consisting of two internal flash quantizers and and
spaced at a small frequency step and identical in amplitude and a chain of pipelined residue amplifiers (RAs) [29], each with a
phase is a sinewave at the center frequency modulated by sharp gain of 2 . If each stage were to amplify by more than 2 , the
pulses which are times the magnitude of the individual tones number of stages will be lowered [30]. This architecture evolves
and separated by ( ) small ripples of amplitude compa- into any pipeline ADC, among which the 1.5-b/stage pipeline is
rable to the individual ones. When 2 exceeds the number most popular [20], [21] [Fig. 4(b)].
of quantization thresholds, , that are distributed over the full A CMOS switched-capacitor circuit combines the interstage
range of the multitone signal, the ripple amplitude reduces track-and-hold (T/H), the reconstruction digital-to-analog con-
below one LSB, causing the aforementioned worst-case spurs. verter (DAC), residue forming subtractor, and amplifiers into
In some instances, this dependence of the quantized spectrum the multiplying DAC (MDAC) [21] illustrated at the bottom of
on input waveform can be used to advantage. As we will de- Fig. 4(b). The MDAC operation is captured in the Appendix. Al-
scribe in Section IV, noise accompanying the signal [13] scram- though the operational transconductance amplifiers (OTAs) can
bles the error waveform and converts the spurs into a near-con- be almost perfect if their output settles, it is the capacitor mis-
tinuous spectrum resembling white noise. Before pursuing this match that finally limits the accuracy of the amplified residues.
further, we must examine the effect of various static errors in In addition, there will be INL errors in and . In the fol-
practical Nyquist ADCs and the associated spurs. lowing section, we combine the insights from Section II with1426 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 5. Effect of INL on the output error characteristics and spectrum of a 5-bit flash quantizer digitizing an FS sinusoid as exemplified in two cases. (a) Random
0
INL uniformly distributed over [ 1=2, 1/2] LSB. (b) Systematic INL of 2.5 periods.
numerical experiments to obtain the error characteristics usually not change the integrated spur energy (SNDR) by very
and spectral signature associated with these imperfections. much; in this example, although the SFDR is lower by 10 dB,
the SNDR is lower by only 1.2 dB ( 29.7–28.5 dB).
A. INL in Flash ADCs
Comparator offsets and errors in the reference taps break the B. Interstage Gain Error in Pipeline ADCs
periodicity in the sawtooth portion of the error waveform, low- In a two-step pipeline ADC [Fig. 4(a)], the sawtooth residue
ering harmonics at high indices. This effect is simulated on a ( ) from the -bit coarse quantization is amplified to
5-bit ADC. As Fig. 5(a) shows, some low-order harmonics are overcome the comparator offsets in the fine quantizer . To
higher than the level of (dB) expected for ideal quantiza- simplify realization of the ADC, all internal quantizers in the
tion and thereby limit SFDR. Thus, random INL errors, as long cascade use the same FS. The range of the amplified residue
as they lie within [ , ], neither improve nor from the first stage must align with the FS of . Gain error
considerably worsen the SFDR. On the other hand, correlated in the amplifier will cause misalignment, which adds an error
INL errors systematically warp the error , concentrating —another sawtooth with its own slope equal to —to
into one or more low-order harmonics. For example, Fig. 5(b) the sawtooth residue. When there is no INL error in and the
shows a periodic INL pattern that boosts the seventh harmonic gain error is limited to
in the 5-bit ADC, worsening the SFDR by 10.6 dB ( 41.3–30.7
dB). Although a single large spur limits the SFDR, this spur will (4)PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1427
Fig. 6. Effect of residue gain error on the output spectrum of a two-stage 10-bit quantizer (5–6 bit partition) digitizing a FS sinusoid, as compared to the case of
0
(a) ideal quantization. The following errors and perturbations are introduced sequentially. (b) Residue gain error e = 2 .
the residue error is also limited to the range [Fig. 6(a)], exactly as (2) and (3) predict for
. Since the vertical transitions of . With an error in residue gain of ,
lie at the quantization thresholds of , must be similar the highest spur moves to a lower harmonic index
to the -bit quantization error but with a different slope; and its height rises to dBc [Fig. 6(b)], just as (5) and
that is, is scaled by ( ). Therefore, the spur (6) predict for . In fact, the spectrum in Fig. 6(b) is
levels corresponding to and only differ by an offset the superposition of the spectra of the 10-bit ideal quantizer
of (dB) on a log scale. From (2) and (3), we know [Fig. 6(a)] and the 5-bit ideal quantizer [Fig. 2(c)] with the spur
the magnitude and index of the largest spur for . If the error level of the latter offset by dB .
is dominant, it follows that the SFDR is given by
C. INL in Subquantizer
SFDR dB (5)
As a result of digital error correction [21], INL in the coarse
and the index of the highest spur now corresponds to the fre- quantizer (INL ) does not contribute to the output error
quency of the sawtooth error waveform at the output of the first , provided the amplified residue (Fig. 4) does not
stage as follows: overload the next quantizer and no other imperfections exist.
(6) The overload is usually avoided by one bit of over-range in
(i.e., ) for an INL less than ,where
Fig. 6 shows the results of numerical experiments which . Even if these conditions are met, INL can
verify (5) and (6) on a 10-bit two-stage quantizer with . contribute to and spurs by modulating errors arising from
In the ideal case, the largest spur is dBc located at other imperfections such as the residue gain error .1428 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 6. (Continued.) Effect of residue gain error on the output spectrum of a two-stage 10-bit quantizer (5–6 bit partition) digitizing a FS sinusoid, as compared
to the case of (a) ideal quantization. The following errors and perturbations are introduced sequentially. (c) INL in the 5-bit subquantizer Q . (d) Random dither
0 0
(t) uniformly distributed over [ 1=2; 1=4; 0; +1=4; +1=2](3=4)LSB , added to all thresholds of Q with INL scaled by 1/4.
For example, when INL is not zero, the quantization error ’s output as an analog level centered on one of these
of worsens, and so does , which scales with segments into which the signal sample falls. This level is
as mentioned above. Fig. 6(c) shows the error characteristic and then subtracted from . Error in this level is equivalent to
spur spectrum of the simulated 10-bit quantizer, where random the same amount of error in the input signal except for the
INL of the type shown in Fig. 5(a) is added to the 5-bit , opposite polarity. In the absence of fine quantization, the output
and there is also error in residue gain of . error characteristic consists of constants over the
Once again, the resulting spectrum is found by the superposi- corresponding input segments. If the error is uncorrelated from
tion of two spectra: the 5-bit spectrum shown in Fig. 5(a) offset segment to segment, a larger number of bits in the first stage,
by (dB), and the 10-bit spectrum for ideal , will help to spread out the error across a greater number of
quantization shown in Fig. 6(a). Due to INL , the SFDR de- spurs. However, in real DACs, the error over the segments is
grades from 73.9 dB [Fig. 6(b)] to 71.6 dB [Fig. 6(c)]. Signal often correlated, so will usually concentrate into a few
distortion caused by a smooth curvature in INL will concen- low-index harmonics which cannot be suppressed by more bits
trate error energy in into a few low-order harmonics, of resolution ( ) in the first quantizer.
which can worsen the SFDR even more. Fig. 7(a) shows the spur spectrum of the 10-bit quantizer,
where there is a linear gradient error ranging from
D. DAC Nonlinearity to in the 5-bit MDAC capacitor array , and
The quantization thresholds of divide the input FS into is the unit capacitor. As the input rises, causing more MDAC
segments. Ideally, the first interstage DAC reconstructs capacitors to be switched in, error across the gradient accumu-PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1429
Fig. 6. (Continued.) Effect of residue gain error on the output spectrum of a two-stage 10-bit quantizer (5–6 bit partition) digitizing an FS sinusoid, as compared
to the case of (a) ideal quantization. The following errors and perturbations are introduced sequentially. (e) Reduction in input amplitude by LSB . (f) Polarity
scrambling of INL .
lates. This results in a 2nd-order bowing in , which is number of periods across the FS, the discontinuity at the bound-
evident in Fig. 7(a) as a dominant 2nd harmonic of dBc. aries disappears and INL , which only changes the boundaries,
has no effect on at all.
The residue gain, , lowers ’s contribution to the
E. INL in Second Stage Quantizer output spurs by 6.02 (dB), while the segments in
spread out the spurs in frequency by a factor of , fur-
ther lowering their average level by 3.01 (dB). Therefore,
As quantizes the amplified residue , it also adds error. when INL of dominates, the SFDR of the two-step pipeline
If the only imperfections present are the INLs in and , ADC is given by
we denote the quantization error as . Due to the INL in
, the nonuniform segments of the sawtooth residue see SFDR SFDR dB (7)
different ranges of the quantization error of , resulting in
different segments of over the input FS. When the with the maximum spur located at
only imperfection is the INL of itself, consists of (8)
repeated segments, each equal to the central half range of the
error characteristic of scaled by the inverse of residue gain, Here SFDR is associated with the standalone quantizing
—recall there is one bit over-range in for error a half-scale sinusoid, and is the index of its largest spur.
correction. In addition to the one-LSB vertical transition arising Fig. 8(a) shows the error and spurs in a two-stage 10-bit ADC,
from fine quantization, is discontinuous at the boundaries whose 6-bit fine quantizer suffers from a five-cycle INL error
of the segments. For the special case when INL has an even over the FS. This 6-bit quantizer is constructed from the 5-bit1430 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 7. Effect of reconstruction DAC nonlinearity on the spur spectrum of a two-step 10-bit quantizer with 5–6 bit partition digitizing an FS sinusoid simulated
in the following cases. (a) A linear gradient in the unit cap array of the 5-bit DAC causing a second-order INL and (b) the thermometer bits activating the unit caps
circularly shifted by a random number of positions in each conversion cycle.
quantizer whose error characteristic is shown in Fig. 5(b) with and and are the errors introduced, respectively, by the
one additional bit for overrange. The five-cycle INL is the peri- RA and DAC before fine quantization. The effect of INL is
odic extension of the 2.5-cycle INL in a 5-bit quantizer. Since implicit in (9) because divides the functions , , and
the LSB is scaled down 2 in going from 5 to 6 b, SFDR into subranges. Since we have assumed that and are
is 6 dB better than the 30.7-dB SFDR of the standalone 5-bit on the order of one LSB, that is, much smaller than the input FS,
quantizer shown in Fig. 5(b). From Fig. 8(a), we see that for the second-order effects of the additive errors on the quantization
full 10-bit ADC SFDR dB. Thus, SFDR SFDR error can be neglected; therefore, (9) simplifies to
dB , which is close to the 39.13 dB
that (7) predicts. It is also seen from Figs. 5(b) and 8(a) that (8)
is satisfied. As expected, Fig. 8(b) shows that INL has little ef- (10)
fect on the spur spectrum.
F. Superposition of Errors As we have shown previously, associated with each term in
(10) there is a spectral signature. The sum of the error terms
When all four imperfections are present in a two-step pipeline amounts to superposition of their individual spectral signatures.
ADC, the total error is Figs. 6 and 7 are examples of superposed spectra for
(9) and , respectively. Fig. 6
also shows the second-order effect of the additive error .
where , the overall quantization, consists of quantization of the In the presence of the residue gain error , the saw-
coarse residue by over the possibly different subranges tooth describing departs from unity slope by a factorPAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1431
Fig. 8. Effect of subquantizer nonlinearity on the spur spectrum of a two-stage 10-bit quantizer (5-6 b) digitizing an FS sinusoid with the following perturbations
added in sequence. (a) A five-period systematic INL, INL , into the 6-bit fine quantizer Q , with the half-range INL profile shown in Fig. 5(b). (b) “Random” INL
shown in Fig. 5(a), INL , into the 5-bit coarse quantizer Q
. As shown in Fig. 6(b), the peak spur due to in the techniques, dithering and dynamic element matching (DEM),
ideal quantizer output at translates by a factor and discuss their impact on the SFDR, SNDR, power dissipa-
, where the negative sign indi- tion, and chip area of the ADCs.
cates a shift to lower frequency. Since has little effect on
, the high-order spurs in Fig. 7(a) are almost unchanged. A. Dithering as Low-Pass Filtering
A random noise is referred to as dither [14] when it
IV. METHODS TO LOWER SPURS is added deliberately to the quantizer input signal [4], to
We have shown that more frequent transitions in the quan- the comparator thresholds [22], or indeed to any quantiza-
tization error distribute the asymptotic rms error over a tion element such that . When is periodic and
greater number of spurs, which lowers the level of all the spurs is wide-band, can be resolved into the harmonics of
and improves the SFDR. However, when there are smoothly the fundamental frequency of and some wide-band noise
varying components in , this is no longer an effective components [16]. The harmonic spurs can be found by passing
remedy. Also, for some input waveforms, all of the quantiza- through a comb filter that produces an output at time
tion error power might concentrate on just a few harmonics. that is the average of over all of the times at which
To overcome these potential problems, we randomly perturb had the same value as at that moment [32]. If and
the quantizer characteristic itself in time, thus removing the are jointly ergodic, this time-average nonlinearity will
deterministic link between quantization error and the input . equal the conditional ensemble average of for a given
In this section, we summarize two well-known randomization value of .1432 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 8. (Continued.) Effect of subquantizer nonlinearity on the spur spectrum of a two-stage 10-bit quantizer (5-6 b) digitizing an FS sinusoid with the following
0 0
perturbations added in sequence. (c) Random dither (t) uniformly distributed over [ 1=2; 1=4; 0; +1=4; +1=2](2=4)LSB at the thresholds of Q with INL
scaled by 2/4 and input amplitude less by LSB . (d) Dither of doubled range and a zero INL .
When is injected at the input, the spur spectrum is now for , where is the amplitude of
determined by the convolution and
(11) (13)
where is the PDF of the dither. The convolution implies
a low-pass filtering [13], [16] of the error characteristic , (14)
with the filter impulse response given by . For
the special case of uniformly distributed dither, this corresponds (15)
to filtering by a sinc function in frequency. When the period of
in voltage equals the dither voltage range , the funda- (16)
mental and all of the harmonics of lie at the nulls of the sinc
filter, which suppresses the nonlinearity completely. For ideal Again, given , the mean error is zero as sweeps
quantization, the time-average nonlinearity becomes zero when across .
. Equations (11)–(16) and the associated discussion also holds
Next consider applying dither to a comparator threshold , true when is replaced by and LSB is replaced by
which should be located ideally at as follows: . Fig. 9 illustrates the time-average characteristic of
for two different pipeline ADCs, one with and the other
with , when the thresholds of the first-stage compara-
(12)
tors are dithered.PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1433
Fig. 9. Error characteristics due to the gain error e in the first-stage residue amplifier of pipeline ADCs, before and after applying dither on the coarse comparator
thresholds with (a) n = 4 versus (b) 1.5 b.
Among the three error terms in (10), and both Fig. 10(a) shows an implementation of threshold dithering.
contain periodic components which are a by-product of coarse During each conversion, a pseudorandom bit sequence (PRBS)
quantization by . To smooth out these errors, the range of directs switches to choose one of several thresholds around
dither should be made comparable to their voltage period, which the nominal. As an experiment, dither is applied to all 32
is here . Given that the first stage quantizes to only a few thresholds (or equivalently, to the input) of the 5-bit with
bits, this implies a large dither power, which will worsen the an INL that is a quarter of that shown in Fig. 5(a). The dither
SNR to the level of an -bit quantizer. To avoid this, the dither consists of an equiprobable pseudorandom selection from the
injected at the input is filtered so that its spectrum is mainly out set . Fig. 6(d)
of the signal band of interest [4] or, alternatively, the dither per- shows the resulting error and the corresponding spurs.
turbing the comparator thresholds [22] or the input of the coarse Dither lowers the spurs around index , but
subquantizer is automatically removed at the ADC output spur levels at low indices are unaffected because, as shown in
by digital error correction [21]. Since it is costly to generate the Fig. 9(a), the symmetric dither cannot reach the last
colored noise, the latter approach is preferred. regions at the two edges of the sawtooth . As discussed
As the input FS is bounded, the time-average nonlinearity earlier in the text associated with Fig. 2, a sinewave probing
near the boundary of the FS can be very different from that these regions produces the bell portion in the error waveform
around the middle. This edge effect is addressed next. giving rise to low-order harmonics. This edge effect is lowered
by reducing the input amplitude by , as shown in
Fig. 6(e). Low-order components in INL nevertheless produce
B. Edge Effect and Signal Strength a significant peak at .
As is shown Fig. 9(b), the edge effect becomes severe
The dither added at the input may overload the ADC, causing for 1.5-b/stage ADCs when the gain error in the first-stage
clipping nonlinearity at the edges. We can avoid this by con- residue amplifier dominates, because a symmetric threshold
fining the signal within [ , ]. However, dither cannot reach at least half the definition region of .
the edge effect in the case of threshold dithering can be easily Now the input amplitude must be halved so that the entire
overlooked. sinewave experiences threshold dithering, which brings lim-1434 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 10. Implementations of threshold dithering and DEM. (a) Dither injected to Q thresholds using switches s and offset polarity randomized using the
swappers preceding and following the comparators. (b) Thermometer bits d(i) (i = 1; 2; . . . 2 ) which activate the DAC unit caps scrambled using butterfly
swappers [35].
ited improvement in the SFDR. This is shown in Fig. 11, , including one at zero threshold, dither improves SFDR
which plots the SFDR versus input sinusoid amplitude of over a much wider range of input amplitudes, as is shown
two simulated 12-bit pipeline ADCs in which the first stage’s in Fig. 11(b). However, at very low amplitudes, every ADC
quantizer resolves, respectively, b [Fig. 11(a)] and eventually behaves like a slicer. The SFDR of the resulting
b ([Fig. 11(b)]. A residue gain error is deliberately square wave is constant at 10 dB, which is the relative level
introduced into both ADCs, and dither is injected into the of the fundamental and third harmonic. This is borne out by
thresholds of the first-stage comparators. Fig. 11(a) shows that Fig. 11, which shows a flat SFDR below an input of dB FS
the SFDR rises as the input amplitude falls from 0 dBFS to (two LSBs of 12 b) and dB FS (one LSB of 12 b) for
about dB FS. and 4 b, respectively. The difference between the two
Dither makes little difference in the output SFDR of a cases has to do with quantization around zero. In the 1.5-b/stage
1.5-b/stage pipeline ADC quantizing a sinewave with ampli- pipeline, gain error does not affect the quantization of very
tude below dB FS, as Fig. 11(a) shows. This is because small signals. However, when the first pipeline stage resolves
a waveform bracketed by the two dithered comparator thresh- 4 b, the quantization step on each side of the zero threshold is
olds sees no transitions in the piecewise linear . In a distorted by half LSB for , which is the
4-b/stage pipeline where there are many more transitions in highest allowed DNL.PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1435
Fig. 11. SFDR versus signal strength for two 12-bit multistep ADCs digitizing a sinusoid with gain error e in the first-stage residue amplifier and threshold
0 0
dither (t) on the first-stage quantizer: (a) 1.5-b/stage ADC with (t) uniformly distributed over [ 1=2; 1=4; 0; +1=4; +1=2](7=8)(FS=4) and e = 2
0 0
and (b) n = 4 with (t) uniformly distributed over [ 1=2; 1=4; 0; +1=4; +1=2](3=4)LSB and e = 2 .
C. DEM In this case, scrambling the polarity of the comparator offsets
Now the spurs that remain after low-pass filtering by the in offers a remedy; alternatively, can be realized as a
dither limit the SFDR. These low-order spurs can be spread out 1.5-b/stage pipeline quantizer, whose sawtooth type error can
in a spectrum by scrambling the smoothly varying components be randomized with threshold dithering.
of in time, which is generally referred to as DEM [34]. The remaining error term in (10), , can be scrambled
Fig. 10(a) shows a way to scramble the polarity of the INL if, over time, different sets of the unit DAC elements are ran-
that is dominated by the offsets in the coarse comparators by domly associated with each DAC output level. This dynamic al-
swapping, under control of a PRBS generator, both the input and location of elements is used, for example, in – modulators to
output polarity of comparators at each conversion. Over time, linearize multibit DACs [34]–[38]. Among the two well-known
this drives the average INL to zero. As shown in Fig. 6(f), this ways to dynamically allocate elements, it is much simpler to
removes the low-order peaks remaining in Fig. 6(e). Thermody- randomize than it is to noise-shape the spur spectrum
namic noise in the system automatically dithers the remaining with data-driven DEM.
high-order peaks associated with . A simple DEM algorithm shifts the thermometer bits control-
Fig. 8(c) and (d) shows that, when INL and INL dominate ling the DAC unit elements by a random number. The random-
the imperfections, threshold dithering does not spread the spec- izer uses a butterfly structure [35] consisting of a matrix of cross-
trum of quantization error ( ). connected swappers shown in Fig. 10(b). As seen in Fig. 7(b),
If INL has an even number of periods, then INL , and hence dynamic element allocation suppresses the large second-har-
threshold dithering in , will have negligible effect on . monic in Fig. 7(a). The high-order spurs arising from also1436 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
Fig. 12. Multibit versus 1.5-bit first stage in terms of SFDR and SNDR over random capacitor mismatch and comparator offsets for 12-bit MDAC-based ADCs,
whose first stage is followed by scaled 1.5-bit stages, digitizing a full-scale sinusoid. (a) n = 1:5 with 12-bit matching in the unit caps, (C )=C = 2 , and
0
the offsets uniformly distributed over [ 1=8; 1=8](FS=8) in the first stage. (b) n = 4 with 11-bit matching in the unit caps and the offsets uniformly distributed
0 0 0
over [ 1=8; 1=8]LSB in the first stage. (c) n = 1:5 with a random dither (t) uniformly distributed over [ 1=2; 1=4; 0; +1=4; +1=2](7=8)(FS=4) applied
to comparator thresholds in each stage and the input amplitude reduced by FS=4 to avoid the edge effect. (d) n = 4 with dithering and DEM applied as described
in Fig. 10 and amplitude reduced by LSB .
disappear, because the scrambled DAC errors acts as dither for the contribution of the gain error . This error is usually
the next stage of quantization. smaller than and, as a result, the SNDR of the ADC de-
grades by at most about 3 dB.
D. Tradeoffs The real tradeoff is in power and area. To make room for the
Randomization degrades SNDR for two reasons. First, it may threshold dithering, the offset of the coarse comparators must
be necessary to lower signal amplitude in order to overcome be well below . This means the comparators and, conse-
the edge effect. One remedy is to raise the first-stage resolu- quently, the power-hungry front-end T/H that drives the coarse
tion which progressively shrinks the edge effect. Fig. 6(d) comparators must be scaled up. In contrast, the PRBS generator
and (e) shows that, for b, the SNDR degrades by only and the switch matrix that implement the randomization tech-
0.9 dB (from 57.6 to 56.7 dB) when the signal swing is re- niques consume much less power and area.
duced from the FS by 2 . Second, the error magnitude in- Finally, the switch on-resistance and parasitics in the signal
creases. When the out-of-band noise is injected at the input, any path degrade circuit bandwidth and therefore conversion rate.
in-band leakage directly worsens the SNR. Though the dither in Since pipeline ADCs use switched-capacitor circuits, “good”
the coarse quantizer is cancelled at the output by digital error switches are supposed to be available for implementing the ran-
correction, it increases the residue range and therefore worsens domization techniques.PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1437
V. ADC ARCHITECTURE FOR A HIGH SFDR will limit the overall SFDR. Harmonic distortion of less than
With these results in hand, we propose an architecture for a dBc at reasonable input frequencies (say, tens of mega-
calibration-free pipeline CMOS ADC that employs randomiza- hertz) is within the reach of state-of-the-art T/H circuits using
tion to reach an SFDR of more than 100 dB. linearized sampling switches [29], [31]. However, a detailed dis-
While CMOS pipeline ADCs use the efficient and simple cussion is beyond the scope of this paper.
1.5-b/stage architecture [20], [21], recent ADCs intended for
SFDR above 80 dB have departed from this trend by quantizing VI. CONCLUSION
multiple bits in the first stage of the pipeline [23], [27]–[30]. As
This paper relates the spur spectrum of a quantized sinewave
(4) and (5) show, a first stage that quantizes multiple bits results
to the error waveform and the error characteristic
in a pipeline that is more tolerant of gain error . However,
arising from quantization and other imperfections in
the random mismatch among the DAC capacitors, giving rise
Nyquist ADCs. This approach, aided by MATLAB simula-
to , limits the SNDR and SFDR. Indeed, measurements
tions, enables intuitive yet reasonably accurate analysis of
of random mismatch among capacitors as large as pF
the spur signature corresponding to each imperfection. Linear
realized with double poly or with poly over heavily doped dif-
superposition and energy conservation are found to be useful
fusion, show that [39], [40], where is
in explaining the simulated spectra. This framework suggests
the standard deviation in the capacitance . This is confirmed
randomization techniques to improve SFDR and points out
by measurements on a 12-bit pipeline ADC [29] which, using
their limits.
6 bit in the first stage of the pipeline configured as in Fig. 4(a),
Simulations show that the SFDR of 12-bit pipeline ADCs
achieves an SFDR of over 80 dB.
using these randomization techniques can reach 100 dB in the
To push the SFDR of this 12-bit prototype beyond 80 dB,
presence of 12-bit capacitor mismatch. The randomization tech-
we propose the following. First, that the DEM, as shown in
niques enhance the SFDR by 20 dB at a cost of about 3 dB in
Fig. 10(b), should eliminate the SFDR bottleneck from .
the SNDR.
Second, that the second-stage 7-bit flash quantizer should
be replaced with a 1.5-b/stage pipeline architecture which loads
the residue amplifier less and suppresses the possible low-order APPENDIX
spurs arising from the smooth INL components typical of a flash
Equation (17)–(20) are used for the numerical simulation of
quantizer. Finally, that threshold dithering and offset scrambling
pipeline ADCs in MATLAB. Assuming a perfect operational
as shown in Fig. 10(a) should suppress spurs caused by gain
transconductance amplifier, an -bit MDAC output is
error in the RAs. To make room for threshold dithering, is
reduced from 6 to 4 b. This architecture resembles a 1.5-b/stage
pipeline ADC, except that its first stage quantizes b. It is
also similar to a published ADC [30], but we believe we have ar-
rived at it following a new and comprehensive line of reasoning.
To see the benefits clearly, this proposed 12-bit ADC is com- (17)
pared in simulation to a classic pipeline which quantizes 1.5 bit
in every stage. Although the first residue could be amplified by
eight in one stage [30], the new ADC uses a cascade of three where is the unit capacitor array with the subscripts and
pipelined gain-of-two switched-capacitor amplifiers as shown in indicating the sampling and feedback capacitors, respectively,
Fig. 4(a). Thus, the two ADCs being compared use exactly the and representing the positive and negative sides of the dif-
same number of op amps. The MDAC and RA operation is mod- ferential MDAC, is the thermometer coded digital word from
eled in MATLAB as described in the Appendix . The first-stage quantizer , and
unit capacitors in the 1.5- and 4-bit MDAC, respectively, are
precise to 12 and 11 b, i.e., and . For a
fair comparison, the total capacitance is also kept equal in both
ADCs. The unit capacitance is scaled down by 50% in each sub-
sequent pipeline stage [26]–[30], which means that unit mis-
match grows by along the stages. Comparator offsets in (18)
are modeled as uniformly distributed over .
Fig. 12 shows the results of simulation. Both ADCs yield
comparable SFDR and SNDR in the presence of the capacitor which defines the reconstructed sample . The output of the
mismatch, but randomization enhances the SFDR of the new 1.5-bit MDAC is given by
ADC by about 20 dB at the small cost of about 3 dB in SNDR.
Fig. 12(d) shows most of the Monte Carlo runs yield better than
a 100-dB SFDR.
Any harmonic distortion in the front-end T/H appears di-
rectly in the ADC output spectrum. This must be lowered to the
(19)
same level as the quantization spurs, otherwise the T/H circuit1438 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 51, NO. 8, AUGUST 2004
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1993. (UCLA), Los Angeles, in 1999.
[19] H. Pan, “A 3.3-V 12-bit 50-MS/s A/D Converter in 0.6-m CMOS with From 1986 to 1991, he was with the Department
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pp. 954–961, Dec. 1987. studied organic compounds and polymers promising
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employing dither to improve linearity,” in Proc. Custom Integrated Cir- Designer Award and an Honorable Mention at the 2000 Design Automation
cuits Conf., May 1999, pp. 109–112. Conference.PAN AND ABIDI: SPECTRAL SPURS DUE TO QUANTIZATION IN NYQUIST ADCS 1439
Asad A. Abidi (S’75–M’80–SM’95–F’96) received
the B.Sc.(Hon.) degree from Imperial College,
London, U.K., in 1976 and the M.S. and Ph.D. de-
grees in electrical engineering from the University of
California, Berkeley, in 1978 and 1981, respectively.
He was with Bell Laboratories, Murray Hill, NJ,
from 1981 to 1984 as a Member of Technical Staff in
the Advanced LSI Development Laboratory. Since
1985, he has been with the Electrical Engineering
Department, University of California, Los Angeles,
where he is a Professor. He was a Visiting Faculty
Researcher at Hewlett Packard Laboratories during 1989. His research interests
are in CMOS RF design, high-speed analog integrated circuit design, data
conversion, and other techniques of analog signal processing.
Dr. Abidi served as the Program Secretary for the International Solid-State
Circuits Conference from 1984 to 1990 and as General Chairman of the Sym-
posium on VLSI Circuits in 1992. He was Secretary of the IEEE Solid-State
Circuits Council from 1990 to 1991, and from 1992 to 1995 he was Editor of
the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He was the recipient of the 1988
TRW Award for Innovative Teaching and the 1997 IEEE Donald G. Fink Award
and is co-recipient of the Best Paper Award at the 1995 European Solid-State
Circuits Conference, the Jack Kilby Best Student Paper Award at the 1996 In-
ternational Solid-State Circuits Conference (ISSCC), the Jack Raper Award for
Outstanding Technology Directions Paper at the 1997 ISSCC, and the Design
Contest Award at the 1998 Design Automation Conference. He was the recip-
ient of an Honorable Mention at the 2000 Design Automation Conference and
at the 2001 ISLPED Low Power Design Contest Award. He also recieved the
IEEE Millennium Medal and was named one of the top ten contributors to the
ISSCC.You can also read
