A 1.8-GHz LC VCO With 1.3-GHz Tuning Range and Digital Amplitude Calibration

 
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005                                                                               909

    A 1.8-GHz LC VCO With 1.3-GHz Tuning Range
           and Digital Amplitude Calibration
     Axel D. Berny, Student Member, IEEE, Ali M. Niknejad, Member, IEEE, and Robert G. Meyer, Fellow, IEEE

  Abstract—A 1.8-GHz LC VCO designed in a 0.18- m CMOS                          of most LC VCOs to first order changes with the square of
process achieves a very wide tuning range of 73% and measured                   frequency, practical implementations must provide some way
phase noise of 123.5 dBc/Hz at a 600-kHz offset from a 1.8-GHz                  to stabilize this parameter. Conventional amplitude control
carrier while drawing 3.2 mA from a 1.5-V supply. The impacts
of wideband operation on start-up constraints and phase noise                   schemes use continuous feedback methods and have been
are discussed. Tuning range is analyzed in terms of fundamental                 successfully demonstrated [9]–[11]. Their crucial and effective
dimensionless design parameters yielding useful design equations.               role in stabilizing the oscillation amplitude comes at the cost
An amplitude calibration technique is used to stabilize perfor-                 of added complexity and a noise penalty due to the presence
mance across the wide band of operation. This amplitude control                 of additional noise contributors that feed back to the oscillator
scheme not only consumes negligible power and area without
degrading the phase noise, but also proves to be instrumental in                [9]–[11].
sustaining the VCO performance in the upper end of the frequency                   Section II discusses basic aspects of wideband LC VCO
range.                                                                          design, drawing attention to the frequency dependence of
 Index Terms—Amplitude calibration, band-switching,                             well-known parameters. In Section III, tuning range is ana-
VCO, phase noise, RF CMOS, tuning range, wideband VCO.                          lyzed, yielding equations that quantify design tradeoffs between
                                                                                tuning range and the overall tank quality factor. Section IV
                                                                                covers circuit design details of the VCO core. Section V
                           I. INTRODUCTION                                      presents experimental results, which demonstrate the effective-
                                                                                ness of the proposed solution.
V     OLTAGE-CONTROLLED oscillators (VCOs) are essen-
      tial building blocks of modern communication systems.
The VCO performance in terms of phase noise and tuning range                       II. DESIGN CONSIDERATIONS FOR WIDEBAND LC VCOS
determines basic performance characteristics of a transceiver.
The current trend toward multiband multistandard transceivers                   A. Fundamental Start-Up Constraint
and broadband systems has generated interest in VCOs that                          The equivalent parallel tank impedance at resonance     is a
simultaneously achieve very wide tuning range and low phase                     strong function of the oscillation frequency    and inductance
noise performance [1]–[9]. Whereas relaxation oscillators                         , and is given by
easily achieve very wide tuning range (i.e., 100% or more),
their poor phase noise performance disqualifies them in many
of today’s wireless and wireline applications. Because LC                                                                                     (1)
VCOs have been successfully used in narrowband wireless
transceivers, there is a growing interest in extending their                    where the overall tank quality factor      is assumed to be dom-
tuning range. Recently, several wideband CMOS LC VCOs                           inated by inductor losses characterized here by the physical se-
have been demonstrated using a variety of techniques [1]–[4].                   ries resistance of the coil, which eventually becomes a func-
The high intrinsic                of inversion- or accumula-                    tion of frequency due to skin/proximity effects and substrate
tion-type MOS varactors supports a very wide tuning range and                   eddy current induced losses. The above equation is valid as long
their is sufficiently high that good phase noise performance                    as the capacitive elements of the tank have a significantly higher
can be maintained [3]. However in practice, the overall phase                      than the inductor, which may not hold true at very high fre-
noise performance is also highly dependent on the tuning                        quencies. In the work presented, (1) is valid in its simplest form
sensitivity of the VCO, since noise from preceding stages                       over the targeted range of operation.
of the frequency synthesizer is inevitably injected into the                       In any oscillator, the most fundamental design criterion con-
VCO control input. Hence, aside from achieving a high tuning                    sists of satisfying start-up conditions. In tunable LC oscilla-
range, practical wideband VCO solutions must also control                       tors, these conditions are themselves a function of frequency
the tuning sensitivity. Furthermore since the tank amplitude                    [5]. For the generic LC oscillator shown in Fig. 1, such condi-
                                                                                tions are satisfied if the pair of complex conjugate poles of the
  Manuscript received September 3, 2004; revised December 1, 2004.              small-signal (initial) loop-gain transfer function lie in the RHP,
This work was supported by the U.S. Army Research Office under Grant            which occurs when the magnitude of the loop-gain is greater
DAAD19-00-1-0550.                                                               than unity
  The authors are with the Department of Electrical Engineering and Com-
puter Science, University of California, Berkeley, CA 94720-1770 USA (e-mail:
axelb@eecs.berkeley.edu).                                                                                                                     (2)
  Digital Object Identifier 10.1109/JSSC.2004.842851

                                                              0018-9200/$20.00 © 2005 IEEE
910                                                                          IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005

Fig. 1. Generic LC oscillator.

Fig. 2. Differential cross-coupled LC oscillator.
                                                                      Fig. 3. (a) Steady-state oscillator amplitude versus I trend and (b) phase
                                                                      noise versus I trend, indicating current- and voltage-limited regimes.
Equation (2) indicates a fundamental lower limit on the current
consumption for a given transconductor and LC tank config-
uration. Moreover, the pronounced frequency dependence in             be reduced as frequency increases in order to prevent such a
                                                                      transition from occurring, otherwise power is wasted.
(2) indicates that the worst-case scenario occurs at the low-end
                                                                         To gain insight into the impact of oscillation amplitude varia-
of the desired frequency range. In practice, the small-signal
transconductance        is set to a value that guarantees startup     tions on phase noise, we consider the simplified case of a generic
with a reasonable safety margin under worst-case conditions.          linear time-invariant LC oscillator with an equivalent noise gen-
                                                                      erator across its tank, as shown in Fig. 1. Applying Kirchoff’s
Increasing      beyond this chosen value generally contributes
                                                                      equations and solving for the noise to signal power ratio reduces
more noise and is thus undesirable. As frequency increases,
the corresponding increase in          lessens the required     .     to (3). More rigorous treatments of phase noise can be found in
Thus, wideband VCOs using transconductors fixed at a prede-           [13]–[17]. Despite its simplicity, (3) highlights some of the most
                                                                      important dependencies
termined critical value feature significant excess of      in the
upper portion of their frequency range.

B. Impact of Oscillation Amplitude Variations
   The steady-state oscillation amplitude is an important design                                                                            (3)
characteristic of oscillators, and can also have a significant im-
pact on neighboring system blocks. The amplitude of any os-           where                    has been substituted, implying that noise
cillator is determined by some nonlinear limiting mechanism           generators from the energy-restoring transconductor and from
forcing the steady-state loop gain to unity. For the widely used      the tank loss dominate, as is often the case.     is the tank am-
differential cross-coupled LC oscillator shown in Fig. 2, two         plitude and      is the frequency offset from the carrier. is an
such regimes can be discerned [2], [12]. In the current-limited       excess noise factor (      for long-channel devices).
regime, the current       from the tail current source is periodi-       Further insight is gained by considering (3) across the two
cally commutated between the left and right sides of the tank.        different regimes of operation described earlier. In the current-
Thus, the resulting fundamental amplitude is directly propor-         limited regime, (3) can be rewritten as follows:
tional to      and     , whereas higher harmonics of the com-
mutated current are attenuated by the bandpass profile of the                                                                               (4)
LC tank. As      is increased from its minimum value satisfying
start-up conditions, the tank amplitude increases linearly. Even-     For narrowband designs,          does not vary appreciably over
tually, the amplitude saturates to a plateau dictated by the avail-   the tuning range and thus                           where is a
able headroom from the supply voltage. These two regimes are          chosen start-up safety margin. Under these conditions, the phase
illustrated in Fig. 3(a). Operating an oscillator in the voltage-     noise shows a               dependence. While this highlights the
limited regime is generally undesirable because the added power       importance of       , a careful optimization should consider
consumption no longer increases the amplitude and is thus rec-        as a function of       for the chosen technology and area con-
ognized as a waste of power [2].                                      straints, as discussed in [2]. Also apparent in (4) is the direct
   In wideband VCOs, large changes in         with frequency [see     relationship between bias current and phase noise, which pro-
(1)] can also cause a transition from the current-limited to the      vides the designer with a convenient way to trade power for
voltage-limited regime as frequency increases. Thus,        should    noise performance.
BERNY et al.: A 1.8-GHz LC VCO WITH 1.3-GHz TUNING RANGE AND DIGITAL AMPLITUDE CALIBRATION                                                       911

  In the voltage-limited regime, (3) can be rewritten as follows:

                                                               (5)

where              due to the excessive signal amplitude bringing
the transconductor into its resistive region, which degrades the
overall tank quality factor      . In a narrowband design where
the voltage-limited regime is reached by increasing , (5) in-
dicates that the phase noise must degrade since the amplitude
saturates to        while the transconductor noise keeps rising.
The fact that       decreases as well typically exacerbates this
phase noise degradation. Fig. 3(b) shows a typical scenario of
PN versus . The boundary between the two regimes of oper-
ation represents the optimum point for achieving lowest phase        Fig. 4. Periodic-steady state simulation of varactor capacitance versus V
noise. Increasing      beyond this point not only wastes power,      for two different tank amplitudes.
but also degrades the phase noise.
   While the above observations yield important insights for           Overall, amplitude variations in wideband VCOs not only
narrowband designs, frequency dependences must be taken into
                                                                     cause detrimental variations in the phase noise performance
account in order to assess similar characteristics for wideband
                                                                     over frequency, but also impact the functionality of neighboring
VCOs. Here, we restrict the analysis to the current-limited
                                                                     blocks. Thus, it can be concluded that providing a way to
regime since it is the preferred region of operation, as discussed
                                                                     control the oscillation amplitude dependence on frequency is
above. Again starting from (3), a phase noise expression high-
                                                                     highly desirable.
lighting its frequency dependence is derived assuming a fixed
current     and
                                                                     C. Amplitude Control Scheme
                                                               (6)      As discussed in the previous sections, the tank impedance
                                                                     variations present in truly wideband designs significantly affect
Equation (6) reveals a somewhat counter-intuitive result: phase      the VCO operation and can no longer be ignored. Methods to
noise tends to improve as frequency increases. Even in cases         address this issue typically consist of some form of amplitude
where      grows linearly with frequency (equivalent to a flat-      control. A conventional method of controlling the amplitude of
tening of     with frequency), (6) shows that phase noise is rel-    a VCO is by means of an automatic amplitude control (AAC)
atively constant with frequency. The reason why phase noise          loop [10], [11], where a continuous-time feedback loop pro-
does not degrade with its classical dependence is that the tank      vides very accurate control of the oscillation amplitude and at
amplitude in this particular topology basically grows with .
                                                                     the same time ensures startup conditions are met. As in all feed-
However, (6) only applies in the current-limited regime. Wide-
                                                                     back systems, great care must be taken to ensure that the loop
band designs operated with fixed       experience significant am-
                                                                     remains stable under all operating conditions. Furthermore, the
plitude growth as frequency increases, which eventually brings
                                                                     presence of additional noise generators in the loop can signifi-
the VCO into the voltage-limited regime where phase noise is
                                                                     cantly degrade the phase noise performance.
known to degrade. Furthermore, the optimal point for lowest
                                                                        In this work, we propose an alternative amplitude control
phase noise indicated in Fig. 3(b) cannot be held across fre-
quency.                                                              scheme to alleviate the deficiencies inherent in the conventional
   Amplitude variations in wideband VCOs cause several addi-         approach. Instead of a continuous feedback loop, a calibration
tional second order effects which may be of concern, depending       approach is used as shown in Fig. 5. The VCO amplitude is
on the application. One such effect is the effective reduction       first peak detected and compared to a programmable reference
of the varactor’s capacitive range                  and the asso-    voltage setting the desired amplitude. The output of the com-
ciated reduction in the overall tuning sensitivity. Fig. 4 shows     parator is analyzed by a simple digital state machine that decides
a periodic-steady-state (PSS) SpectreRF simulation of a typ-         whether to update the programmable bias current of the VCO or
ical MOS varactor - curve for different values of oscillation        to end calibration. This method has the advantage of being ac-
amplitude. Although the corresponding reduction of the tuning        tive only during calibration. Thus, the steady-state phase noise
range is easy to account for and compensate, amplitude-depen-        performance of the VCO is not affected. Furthermore, the open-
dent variations of the tuning sensitivity need to be addressed in    loop nature of this calibration method eliminates any concerns
the design of the frequency synthesizer. Other effects generally     of instability. In addition, the power consumed by calibration
consist of how amplitude variations affect neighboring blocks in     circuits is negligible since they are powered off as soon as cali-
the system. One such example would be a mixer, where the con-        bration ends. While a constant-amplitude versus frequency cal-
version gain would vary if the VCO amplitude changes widely.         ibration is most obvious, the fully programmable nature of this
Another example would be a prescaler (or divider) that inter-        method can be exploited to implement more intricate applica-
faces to the VCO.                                                    tion-specific calibration scenarios.
912                                                                            IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005

                                                                        Fig. 6. Generic binary-weighted band-switching LC tank configuration.

                                                                           For a given set of specifications, the tuning range extremities
                                                                        are defined as follows:
Fig. 5.   Proposed calibration-based amplitude control scheme.                                                                                  (9a)

   For a constant-amplitude scenario where         is scaled with                                                                               (9b)
frequency, (3) can be rewritten to show the resulting phase noise
versus frequency trend                                                     To guarantee that any two adjacent sub-bands overlap, the
                                                                        following condition must be satisfied:
                                                                  (7)
                                                                                                                                                (10)
where                has been substituted for and     approx-
imated as         . If is approximately constant over the fre-          where                         and                                . Using
                                                                        (8a) and (8b), (10) can be rewritten as
quency range and transconductor noise dominates, (7) indicates
a 9-dB/octave trend.
                                                                                                                                                (11)
      III. TUNING RANGE: ANALYSIS AND CONSIDERATIONS
                                                                        where is a chosen overlap safety margin factor and is greater
  One of the main challenges of wideband low-phase-noise                than unity. Equation (11) can be substituted in (9a) to solve for
LC VCO design consists of expanding an intrinsically narrow                 independently of , giving
tuning range without significantly degrading noise perfor-
mance or incurring excessive tuning sensitivity. In recent                                                                                      (12)
years, band-switching techniques have been used extensively.
Inherently well adapted to the scaling of MOS technology,
these techniques have proved to be successful ways to increase          Thus, having chosen parameters           , and , and given de-
tuning range and/or decrease tuning sensitivity [3], [5], [18].         sign constants           , and , one can solve for       and
  The following analysis is based on a generic binary-weighted          [using (11)]. Considerations in choosing these parameters are
band-switching LC tank configuration of size , as shown                 discussed in subsequent paragraphs.
in Fig. 6. The following definitions are used in subsequent                Taking the ratio of (9b) and (9a) yields the tuning range TR
derivations:                                                            as a function of only ’s, , and

                                                                 (8a)

                                                                 (8b)

                                                                 (8c)
                                                                                                                                                (13)
         is the minimum varactor capacitance for the available             To be able to quantify the impact of lossy switches, we note
tuning voltage range and is reached as the device enters its de-        that the quality factor of the capacitor array is well approximated
pletion mode.          represents the effective capacitance of a        as                             , where       is the resistance of the
unit branch of the array in the off state. The MOS switch in            unit MOS switch. Given that                           , the resulting
a unit branch of the array contributes a parasitic capacitance          quality factor of the capacitor array is given by
    that is mainly composed of its drain-to-bulk junction and
drain-to-gate overlap capacitors, giving                     . Note                                                                             (14)
that if coarse-tuned varactors are used instead of switched ca-
pacitors (see [3]),    retains the same meaning.       is the total     Note that since the MOS switch would generally use the min-
lumped parasitic capacitance and          equals the total tank ca-     imum available gate length and             , the product         is
pacitance. Hence, (8c) may be equivalently expressed as                 approximately constant for a given technology. Fig. 7(a) shows
                    . Furthermore, note that according to equa-         values of TR and       from (13) and (14) plotted versus        for
tions (8a–c), increasing any one of the defined terms increases         a typical scenario, and clearly illustrates the direct tradeoff be-
the achievable tuning range.                                            tween tuning range and        . As the MOS switches are made
BERNY et al.: A 1.8-GHz LC VCO WITH 1.3-GHz TUNING RANGE AND DIGITAL AMPLITUDE CALIBRATION                                                         913

Fig. 7. (a) Tuning range and capacitor array quality factor versus   .
(b) Tuning range versus Q .                                              Fig. 8. (a) Tuning range versus  for different number of bits in the capacitor
                                                                         array. (b) Tuning range versus .

larger to decrease their resistance, their off-state parasitic ca-
pacitance grows proportionally thus reducing the tuning range.           for choosing the optimal inductance is difficult to generalize,
   Furthermore, (14) is substituted into (13), and the resulting         as several conflicting performance tradeoffs are involved. In
expression is plotted in Fig. 7(b). Hence, Fig. 7(b) gives the           particular, the start-up constraint described by (2) gives
                                                                                       , which indicates that a large inductance is pre-
tuning range TR as a function of         , for given technology con-
                                                                         ferred in terms of power consumption. Note that although this
stants (           and ), chosen safety factor , and design pa-
rameters , and . The practical significance of Fig. 7(b) lies            is usually true, it may not be the case in situations where the
in its ability to quantify the fundamental tradeoff between phase        inductor quality factor varies significantly over the considered
                                                                         range of inductance. Furthermore, recall that phase noise shows
noise and tuning range. For instance, a design aiming to achieve
                                                                         a            in the current limited regime. While this may seem
a 2:1 tuning range while using an inductor with               , would
reduce the overall        by about 20% (i.e.,           ) and thus in-   to favor larger as well, the dependence between the inductor’s
crease the phase noise by approximately 2 dB (all evaluated at           quality factor and its inductance must now be taken into account.
                                                                         Even if this dependence is relatively weak in many cases, the
2.4 GHz).
                                                                         cubic term can quickly make a significant difference on phase
   Another important design parameter of the band-switching
                                                                         noise. In summary, finding the optimal inductance for a given
configuration is the array size (i.e., the number of bits control-
                                                                         design ultimately depends on which constraints are most im-
ling the binary-weighted array). As one would suspect, adding
                                                                         portant to the intended application.
more bits to the array is beneficial to the tuning range but only to
a certain degree. Beyond a certain point, the minimum fixed ca-
pacitance in the design prevents any further improvement. To                                       IV. CIRCUIT DESIGN
gain better insight for this trend, (13) is plotted for different           The VCO core is based on a standard LC-tuned cross-cou-
values of and shown in Fig. 8(a).                                        pled NMOS topology, chosen primarily for its ability to achieve
   From Fig. 8(a), it is clear that the improvement in TR from in-       low phase noise and for its higher headroom and lower para-
creasing quickly saturates, especially in the useful range of            sitics compared to a tail-biased complementary cross-coupled
(i.e., low values of corresponding to high values of ). Nev-             configuration. The LC tank consists of a single integrated dif-
ertheless, increasing still yields a proportional decrease in the        ferential spiral inductor, accumulation-mode MOS varactors al-
tuning sensitivity. In practice, this benefit needs to be weighed        lowing continuous frequency tuning, and a switched capacitor
against the time needed to calibrate the additional bits.                array providing coarse tuning steps. This design is implemented
   Finally, the inductance also plays a critical role for the achiev-    in a 0.18- m bulk CMOS technology. Fig. 9 shows a simplified
able tuning range. Although this dependence may not be clear             schematic of the VCO core.
from (13), recall that                              . Fig. 8(b) shows       The W/L of the cross-coupled NMOS devices is chosen based
a typical plot of (13) as a function of . However, a strategy            on oscillation startup requirements at the low-end (worst-case)
914                                                                          IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005

                                                                      Fig. 10. Phase noise at 1.2, 1.8, and 2.4 GHz for a core power consumption of
                                                                      10, 4.8, and 2.6 mW, respectively.

Fig. 9. Simplified VCO core schematic.

of the tuning range. Since the drain noise current of the cross-
coupled devices is the dominant noise contributor in this design,
the lengths are made larger than minimum-size to limit short-
channel induced excess noise. This results in a device width of
32 m and length of 0.3 m.
   In order to achieve a large frequency range while keeping a
relatively low tuning sensitivity         , the LC tank combines
a switched capacitor array with a small varactor. The targeted
frequency range is split into 16 sub-bands by means of a 4-bit
                                                                      Fig. 11.   Measured frequency tuning range.
binary-weighted array of switched MIM capacitors. The capac-
itors are switched in and out of the tank by differential switches.
Long thin NMOS transistors are added to provide a dc reference        buffer is included on-chip to facilitate driving a 50- environ-
point to the source and drain of each switch (when on) without        ment. An on-chip balun converts the differential buffer output
adding significant parasitics at those nodes. Each switch con-        into a single-ended signal compatible with the measurement
tributes additional loss to the tank due to its finite resistance,    apparatus. Biased with 8.5 mA, the buffer delivers a nominal
     . Thus, minimum-length NMOS devices are utilized and             output power of about 12 dBm at 1.8 GHz.
made as wide as can be tolerated with regards to the resulting           Phase noise measurements were performed on a HP8563E
parasitic drain-to-bulk capacitance, which ultimately limits the      spectrum analyzer running the phase noise measurement option.
achievable tuning range.                                              Fig. 10 shows the measured and simulated phase noise at the
   Because the desired tuning range has been divided into sev-        lower, middle, and upper ends of the tuning range running at a
eral sections, a small accumulation-mode NMOS varactor is             core power consumption of 10, 4.8, and 2.6 mW, respectively.
sufficient to cover each frequency sub-band. Each varactor is         Measurements show good agreement with simulations. Beyond
115 m wide with a gate length of 0.92 m and has a max-                offset frequencies of about 1 MHz, the measurement is limited
imum capacitance of 0.87 pF. It achieves an intrinsic small-          by the noise floor of the spectrum analyzer.
signal              ratio of about 3.2. Because the middle of the        A very wide tuning range of 73% is achieved with a control
varactor - characteristic occurs for a gate-bulk bias of about        voltage tuned from 0 to 1.5 V. The VCO tuning range is illus-
0 V, each varactor is ac-coupled to the tank via a 5-pF series        trated in Fig. 11, showing all 16 overlapping frequency sub-
                                                                      bands. The measured frequency range is 1.14–2.46 GHz with
MIM capacitor and its gate is biased at             , as shown in
                                                                      a maximum tuning sensitivity             of 270 MHz/V.
Fig. 9.
                                                                         Fig. 12 shows the measured buffer output voltage waveform
                                                                      during amplitude calibration runs at 1.4, 1.8, and 2.2 GHz for a
                   V. EXPERIMENTAL RESULTS                            VCO differential tank amplitude programmed to 1.1 V. The cal-
   This VCO was fabricated in a commercially available                ibration begins by setting the bias current to its maximum value.
0.18- m CMOS process. The tank inductor was realized as               The current source control bits are decremented until the com-
a 5.6-nH differential spiral on a 2- m-thick top metal layer          parator toggles low, indicating that the VCO output is now lower
achieving a measured (single-ended) ranging from about 7.5            than the programmed reference level. Fig. 12 also captures the
to 9 over the VCO frequency range. The VCO was measured               transition from voltage-limited to current-limited regime at 1.8
on a test board built on standard FR4 material. The die was           and 2.2 GHz, where the voltage amplitude responds noticeably
glued directly onto the PC board with conductive silver epoxy         slower to the decreasing bias current during the first several cal-
and wirebonds were used to connect all inputs and outputs. A          ibration cycles. Faster and more elaborate calibration routines
BERNY et al.: A 1.8-GHz LC VCO WITH 1.3-GHz TUNING RANGE AND DIGITAL AMPLITUDE CALIBRATION                                                            915

                                                                             Fig. 14.   FOM versus frequency for calibrated and uncalibrated cases.
Fig. 12. Measured amplitude calibration runs at 1.4, 1.8, and 2.2 GHz.

Fig. 13. Measured phase noise at 100-kHz offset and core power consumption
versus frequency for calibrated and uncalibrated cases.

can easily be implemented by modifying the digital state ma-
chine. The time required to run the calibration routine is at most
               , where is the number of current source control
bits and             is the time needed to complete a single cali-
bration cycle, here dominated by the settling time of the peak
detector ( 100 ns). Hence, a conservative                   of about
600 ns was used as a proof of concept and does not represent
the actual minimum settling time needed for this implementa-
tion. This amplitude control scheme features a basic tradeoff be-
tween amplitude accuracy and speed. This implementation uses
         , providing amplitude control from             to         in        Fig. 15.   Die photograph.
increments of                            and a worst-case calibration
run time of                  .1 Alternatively, could be increased            remains constant. At the upper-end of the tuning range, this re-
to improve accuracy at the expense of a longer calibration time.             sults in a tank amplitude that is too large and considerably de-
If     is large, the errors introduced by the peak detector and              grades phase noise, as discussed in Section II. In the calibrated
comparator offset may be comparable to the quantization error                case, the bias current is effectively scaled down with frequency
and may need to be considered. In many applications, the cal-                to maintain the tank amplitude approximately constant, helping
ibration time can be tolerated and a calibration can be initiated            to sustain the phase noise performance over the upper-end of the
every time the synthesizer is tuned to a new frequency, without              tuning range. The 9-dB/octave trend predicted by (7) is consis-
adding significant overhead to the overall settling time. Alter-             tent with the measurements.
natively, a full set of calibrations (for each frequency sub-band)              Fig. 14 casts the data provided in Fig. 13 as a power-fre-
can be run at power-on and the results stored as a look up table             quency-tuning-normalized (PFTN) figure of merit (FOM), in-
in memory.                                                                   troduced in [2], for calibrated and uncalibrated scenarios. The
   Fig. 13 shows the phase noise performance across the VCO                  combination of lower phase noise and lower power consump-
frequency range for calibrated and uncalibrated scenarios. In the            tion for the calibrated scenario yield a significantly improved
uncalibrated case, the bias current is set just high enough to sat-          FOM in the upper half of the frequency range.
isfy start-up requirements at the low-end of the tuning range and               A photograph of the VCO die is shown in Fig. 15. The total
   1V       and V       are the minimum and maximum desired tank amplitude   chip area including bondpads is 1.7 mm . Table I summarizes
settings, respectively.                                                      the VCO performance.
916                                                                            IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005

                           TABLE I                                        [2] D. Ham and A. Hajimiri, “Concepts and methods of optimization of
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                                                                              Plett, and N. G. Tarr, “Design of wide-band CMOS VCO for multiband
                                                                              wireless LAN applications,” IEEE J. Solid-State Circuits, vol. 38, no. 8,
                                                                              pp. 1333–1342, Aug. 2003.
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                                                                              noise CMOS VCO,” in Proc. IEEE Custom Integrated Circuits Conf.,
                                                                              2003, pp. 555–558.
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      VCO PERFORMANCE COMPARISON OF RECENTLY PUBLISHED                        Dec. 2002.
                      WIDEBAND VCOS                                       [7] F. Svelto and R. Castello, “A bond-wire inductor-MOS varactor VCO
                                                                              tunable from 1.8 to 2.4 GHz,” IEEE Trans. Microwave Theory Tech.,
                                                                              vol. 50, no. 1, pp. 403–410, Jan. 2002.
                                                                          [8] J.-K. Cho, H.-I. Lee, K.-S. Nah, and B.-H. Park, “A 2-GHz wide band
                                                                              low phase noise voltage-controlled oscillator with on-chip LC tank,” in
                                                                              Proc. IEEE Custom Integrated Circuits Conf., 2003, pp. 559–562.
                                                                          [9] J. W. M. Rogers, D. Rahn, and C. Plett, “A study of digital and analog au-
                                                                              tomatic-amplitude control circuitry for voltage-controlled oscillators,”
                                                                              IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 352–356, Feb. 2003.
                                                                         [10] M. A. Margarit, J. L. Tham, R. G. Meyer, and M. J. Deen, “A low-
                                                                              noise, low-power VCO with automatic amplitude control for wireless
                                                                              applications,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 761–771,
                                                                              Jun. 1999.
                                                                         [11] A. Zanchi, C. Samori, S. Levantino, and A. Lacaita, “A 2 V
                                                                              2.5-GHz–104 dBc/Hz at 100 kHz fully-integrated VCO with wide-band
                                                                              low noise automatic amplitude control loop,” IEEE J. Solid-State
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                        VI. CONCLUSION                                   [16] J. Rael and A. Abidi, “Physical processes of phase noise in differential
                                                                              LC oscillators,” in Proc. IEEE Custom Integrated Circuits Conf., 2000,
   We have described a 1.8-GHz LC VCO implemented in 0.18-                    pp. 569–572.
m bulk CMOS that simultaneously achieves low phase noise and             [17] K. Kouznetsov and R. Meyer, “Phase noise in LC oscillators,” IEEE J.
a very wide tuning range exceeding 2:1 (73%). To provide robust               Solid-State Circuits, vol. 35, no. 8, pp. 1244–1248, Aug. 2000.
operation and stabilize performance over the entire frequency            [18] A. Kral, F. Behbahani, and A. Abidi, “RF-CMOS oscillators with
                                                                              switched tuning,” in Proc. IEEE Custom Integrated Circuits Conf.,
range, the VCO amplitude is controlled using a digital amplitude              1998, pp. 555–558.
calibration scheme that does not degrade phase noise and con-
sumes negligible area and power. Typical measured phase noise
is 123.5 dBc/Hz at 600-kHz offset from 1.8 GHz for a core
power consumption of only 4.8 mW from a 1.5-V supply. As
shown in Table II, the VCO achieves a PFTN phase noise FOM
ranging from 5 to 8.5 dB over the entire frequency range, which
is one of the highest reported to date.
                                                                                                 Axel D. Berny (S’97) was born in Liège, Belgium,
                                                                                                 in 1977. He received the B.S.E.E. degree from the
                      ACKNOWLEDGMENT                                                             University of Michigan, Ann Arbor, in 2000, and re-
                                                                                                 ceived the M.S. degree in electrical engineering from
   The authors thank IBM for IC fabrication, E. Shelton for his                                  the University of California, Berkeley, in 2002, where
help with FPGA programming, and A. Bevilacqua for helpful                                        he is currently working toward the Ph.D. degree. His
                                                                                                 research has focused on various aspects of RFIC de-
discussions.                                                                                     sign, and in particular on wideband low-noise fre-
                                                                                                 quency synthesizers.
                                                                                                    During the summers of 2000–2002, he worked as
                           REFERENCES                                                            a Design Engineer in the wireless group at Maxim
  [1] J. Kucera, “Wideband BiCMOS VCO for GSM/UMTS direct conversion    Integrated Products, Sunnyvale, CA, where he investigated low phase noise RF
      receivers,” in IEEE ISSCC Dig. Tech. Papers, 2001, pp. 374–375.   VCOs and designed various RF/analog calibration circuits for 802.11 products.
BERNY et al.: A 1.8-GHz LC VCO WITH 1.3-GHz TUNING RANGE AND DIGITAL AMPLITUDE CALIBRATION                                                                    917

                           Ali M. Niknejad (S’92–M’00) received the B.S.E.E.                                 Robert G. Meyer (S’64–M’68–SM’74–F’81) was
                           degree from the University of California, Los An-                                 born in Melbourne, Australia, in 1942. He received
                           geles, in 1994, and the M.S. and Ph.D. degrees in                                 the B.E., M.Eng.Sci., and Ph.D. degrees in electrical
                           electrical engineering from the University of Cali-                               engineering from the University of Melbourne,
                           fornia, Berkeley, in 1997 and 2000.                                               Melbourne, Australia, in 1963, 1965, and 1968,
                              From 2000 to 2002, he worked at Silicon Labora-                                respectively.
                           tories, Austin, TX, where he was involved with the                                   In 1968, he was an Assistant Lecturer in the
                           design and research of CMOS RF integrated circuits                                Electrical Engineering Department, University of
                           and devices for wireless communication applications.                              Melbourne. Since September 1968, he has been
                           He is currently an Assistant Professor in the Depart-                             with the Department of Electrical Engineering and
                           ment of Electrical Engineering and Computer Sci-                                  Computer Sciences, University of California at
ence, University of California, Berkeley. His current research interests are in    Berkeley, where he is currently a Professor. His current research interests are
the area of analog integrated circuits and device modeling, particularly as ap-    high-frequency analog integrated-circuit design and device fabrication. He has
plied to wireless and broadband communication circuits.                            acted as a consultant on electronic circuit design for numerous companies in
   Dr. Niknejad is an active member of the Berkeley Wireless Research Center       the electronics industry. He has co-authored Analysis and Design of Analog
(BWRC) and he is the co-director of the BSIM Research Group. He is currently       Integrated Circuit (New York: Wiley, 1993), edited Integrated Circuit Oper-
serving as an Associate Editor of the IEEE JOURNAL OF SOLID-STATE CIRCUITS.        ational Amplifiers (New York: IEEE Press, 1978), and co-edited Integrated
                                                                                   Circuits for Wireless Communications (Piscataway, NJ: IEEE Press, 1999).
                                                                                      Dr. Meyer is a past President of the Solid-State Circuits Council of the
                                                                                   IEEE. In 1973, 1976, and 1987 he was a Guest Editor of the IEEE JOURNAL
                                                                                   OF SOLID-STATE CIRCUITS and from 1976 to 1982 he was an Associate Editor
                                                                                   of the JOURNAL. He is a former Associate Editor of the IEEE TRANSACTIONS
                                                                                   ON CIRCUITS AND SYSTEMS. He received the 2003 IEEE Leon K. Kirchmayer
                                                                                   Graduate Teaching Award. In 1975 he was a Visiting Professor in the Electrical
                                                                                   Engineering Department of the Catholic University of Leuven, Belgium, and
                                                                                   in 1996 and 2003, he was a Visiting Professor in the Electrical Engineering
                                                                                   Department of Columbia University, New York.
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